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參數(shù)資料
| 型號(hào)： | AGL060V5-VQG100 |
| 廠商： | Microsemi SoC |
| 文件頁(yè)數(shù)： | 156/250頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA IGLOO 1.5V 100VQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | IGLOO |
| 邏輯元件/單元數(shù)： | 1536 |
| RAM 位總計(jì)： | 18432 |
| 輸入/輸出數(shù)： | 71 |
| 門數(shù)： | 60000 |
| 電源電壓： | 1.425 V ~ 1.575 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 100-TQFP |
| 供應(yīng)商設(shè)備封裝： | 100-VQFP（14x14） |
| 其它名稱： | 1100-1086 |
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IGLOO Low Power Flash FPGAs
Revision 23
5-3
Revision 19
(continued)
Values for CS196, CS281, and QN132 packages were added to Table 2-5 Package
Thermal Resistivities (SARs 26228, 32301).
for Timing Delays (normalized to TJ = 70°C, VCC = 1.14 V) were updated to remove
the column for –20°C and shift the data over to correct columns (SAR 23041).
The tables in the "Quiescent Supply Current" section were updated with revised notes
on IDD (SAR 24112). Table 2-8 Power Supply State per Mode is new.
The formulas in the table notes for Table 2-41 I/O Weak Pull-Up/Pull-Down
Resistances were corrected (SAR 21348).
The row for 110°C was removed from Table 2-45 Duration of Short Circuit Event
before Failure. The example in the associated paragraph was changed from 110°C to
revised to change 110° to 100°C. (SAR 26259).
The notes regarding drive strength in the "Summary of I/O Timing Characteristics –
V LVCMOS Wide Range" section tables were revised for clarification. They now state
that the minimum drive strength for the default software configuration when run in wide
range is ±100 A. The drive strength displayed in software is supported in normal range
only. For a detailed I/V curve, refer to the IBIS models (SAR 25700).
The following sentence was deleted from the "2.5 V LVCMOS" section (SAR 24916): "It
uses a 5 V–tolerant input buffer and push-pull output buffer."
Module" section and "Output DDR Module" section (SAR 23919).
The following notes were removed from Table 2-147 Minimum and Maximum DC Input
and Output Levels (SAR 29428):
±5%
Differential input voltage = ±350 mV
Specification were updated. A note was added to both tables indicating that when the
CCC/PLL core is generated by Mircosemi core generator software, not all delay values
of the specified delay increments are available (SAR 25705).
The following figures were deleted (SAR 29991). Reference was made to a new
application note, Simultaneous Read-Write Operations in Dual-Port SRAM for Flash-
Based cSoCs and FPGAs, which covers these cases in detail (SAR 21770).
Figure 2-36 Write Access after Write onto Same Address
Figure 2-37 Read Access after Write onto Same Address
Figure 2-38 Write Access after Read onto Same Address
The port names in the SRAM "Timing Waveforms", SRAM "Timing Characteristics"
tables, Figure 2-40 FIFO Reset, and the FIFO "Timing Characteristics" tables were
revised to ensure consistency with the software names (SARs 29991, 30510).
N/A
2-117 to
The "Pin Descriptions" chapter has been added (SAR 21642).
Package names used in the "Package Pin Assignments" section were revised to match
standards given in Package Mechanical Drawings (SAR 27395).
The "CS81" pin table for AGL250 is new (SAR 22737).
The CS121 pin table for AGL125 is new (SAR 22737).
The P3 function was revised in the "CS196" pin table for AGL250 (SAR 24800).
Revision
Changes
Page
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| VI-B6D-CY-F2 | CONVERTER MOD DC/DC 85V 50W |
| VI-B6B-CY-F2 | CONVERTER MOD DC/DC 95V 50W |
| 4-1624113-0 | INDUCTOR 47NH 5% 0805 |
| 5390378-7 | CONN D-SUB RCPT F SCKT 68POS IDC |
| AGLN020V5-QNG68 | IC FPGA 20K 1.5V 68QFN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AGL060V5-VQG100I | 功能描述:IC FPGA IGLOO 1.5V 100VQFP IND RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:IGLOO 標(biāo)準(zhǔn)包裝:24 系列:ECP2 LAB/CLB數(shù):1500 邏輯元件/單元數(shù):12000 RAM 位總計(jì):226304 輸入/輸出數(shù):131 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:208-BFQFP 供應(yīng)商設(shè)備封裝:208-PQFP（28x28） |
| AGL060V5-VQG144 | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL060V5-VQG144ES | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL060V5-VQG144I | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL060V5-VQG144PP | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
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