鍨嬭櫉(h脿o)锛� | AGL400V2-FG484I |
寤犲晢锛� | Microsemi SoC |
鏂囦欢闋佹暩(sh霉)锛� | 187/250闋� |
鏂囦欢澶�?銆�?/td> | 0K |
鎻忚堪锛� | IC FPGA 1KB FLASH 400K 484FBGA |
妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 60 |
绯诲垪锛� | IGLOO |
閭忚集鍏冧欢/鍠厓鏁�(sh霉)锛� | 9216 |
RAM 浣嶇附瑷�(j矛)锛� | 55296 |
杓稿叆/杓稿嚭鏁�(sh霉)锛� | 194 |
闁€鏁�(sh霉)锛� | 400000 |
闆绘簮闆诲锛� | 1.14 V ~ 1.575 V |
瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
宸ヤ綔婧害锛� | -40°C ~ 85°C |
灏佽/澶栨锛� | 484-BGA |
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 484-FPBGA锛�23x23锛� |
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
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AGL400V2-FGG484I | IC FPGA 1KB FLASH 400K 484FBGA |
A3P1000-2PQ208I | IC FPGA 1KB FLASH 1M 208-PQFP |
M1A3P1000L-PQG208I | IC FPGA M1 1KB FLASH 1M 208PQFP |
973-015-020R121 | BACKSHELL DB15 STR METALIZ PLAST |
982-050-010R031 | CONN BACKSHELL DB50 PLST GRY |
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
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AGL400V2-FGG144 | 鍔熻兘鎻忚堪:IC FPGA IGLOO 1.2-1.5V 144FPBGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄e垪锛� 绯诲垪:IGLOO 妯�(bi膩o)婧�(zh菙n)鍖呰:24 绯诲垪:ECP2 LAB/CLB鏁�(sh霉):1500 閭忚集鍏冧欢/鍠厓鏁�(sh霉):12000 RAM 浣嶇附瑷�(j矛):226304 杓稿叆/杓稿嚭鏁�(sh霉):131 闁€鏁�(sh霉):- 闆绘簮闆诲:1.14 V ~ 1.26 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:0°C ~ 85°C 灏佽/澶栨:208-BFQFP 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:208-PQFP锛�28x28锛� |
AGL400V2-FGG144I | 鍔熻兘鎻忚堪:IC FPGA 1KB FLASH 400K 144FBGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄e垪锛� 绯诲垪:IGLOO 妯�(bi膩o)婧�(zh菙n)鍖呰:40 绯诲垪:SX-A LAB/CLB鏁�(sh霉):6036 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):- 杓稿叆/杓稿嚭鏁�(sh霉):360 闁€鏁�(sh霉):108000 闆绘簮闆诲:2.25 V ~ 5.25 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:0°C ~ 70°C 灏佽/澶栨:484-BGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:484-FPBGA锛�27X27锛� |
AGL400V2-FGG144T | 鍒堕€犲晢:Microsemi Corporation 鍔熻兘鎻忚堪:AGL400V2-FGG144T - Trays |
AGL400V2-FGG256 | 鍔熻兘鎻忚堪:IC FPGA 1KB FLASH 400K 256FBGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄e垪锛� 绯诲垪:IGLOO 妯�(bi膩o)婧�(zh菙n)鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:256-FPBGA锛�17x17锛� |
AGL400V2-FGG256I | 鍔熻兘鎻忚堪:IC FPGA 1KB FLASH 400K 256FBGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄e垪锛� 绯诲垪:IGLOO 妯�(bi膩o)婧�(zh菙n)鍖呰:40 绯诲垪:SX-A LAB/CLB鏁�(sh霉):6036 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):- 杓稿叆/杓稿嚭鏁�(sh霉):360 闁€鏁�(sh霉):108000 闆绘簮闆诲:2.25 V ~ 5.25 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:0°C ~ 70°C 灏佽/澶栨:484-BGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:484-FPBGA锛�27X27锛� |