IGLOOe Low Power Flash FPGAs
Revision 13
2-49
3.3 V PCI, 3.3 V PCI-X
Peripheral Component Interface for 3.3 V standard specifies support for 33 MHz and 66 MHz PCI Bus
applications.
AC loadings are defined per the PCI/PCI-X specifications for the datapath; Microsemi loadings for enable
AC loadings are defined per PCI/PCI-X specifications for the datapath; Microsemi loading for tristate is
Table 2-69 Minimum and Maximum DC Input and Output Levels
3.3 V PCI/PCI-X
VIL
VIH
VOL
VOH
IOL IOH
IOSH
IOSL
IIL1 IIH2
Drive Strength
Min.
V
Max.
V
Min.,
V
Max.
V
Max.
V
Min.
VmA mA
Max.
mA3
Max.
mA3
A4 A4
Per PCI
specification
Per PCI curves
10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI . Input current is
larger when operating outside recommended ranges.
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
Figure 2-12 AC Loading
Test Point
Enable Path
R to VCCI for tLZ / tZL / tZLS
10 pF for tZH / tZHS / tZL / tZLS
10 pF for tHZ / tLZ
R to GND for tHZ / tZH / tZHS
R = 1 k
Test Point
Datapath
R = 25
R to VCCI for tDP (F)
R to GND for tDP (R)
Table 2-70 AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
VREF (typ.) (V)
CLOAD (pF)
0
3.3
0.285 * VCCI for tDP(R)
0.615 * VCCI for tDP(F)
–10