參數(shù)資料
型號: AGLE600V2-FG256C
元件分類: FPGA
英文描述: FPGA, 13824 CLBS, 600000 GATES, PBGA256
封裝: 17 X 17 MM, 1.60 MM HEIGHT, 1 MM PITCH, FBGA-256
文件頁數(shù): 130/156頁
文件大?。?/td> 5023K
代理商: AGLE600V2-FG256C
IGLOOe DC and Switching Characteristics
Ad vance v0.3
2-61
SSTL3 Class II
Stub-Speed Terminated Logic for 3.3 V memory bus standard (JESD8-8). IGLOOe devices support
Class II. This provides a differential amplifier input buffer and a push-pull output buffer.
Table 2-101 Minimum and Maximum DC Input and Output Levels
SSTL3 Class II
VIL
VIH
VOL
VOH
IOL IOH
IOSH
IOSL
IIL IIH
Drive Strength Min., V Max., V
Min., V
Max., V Max., V Min., V mA mA Max., mA1 Max., mA1 A2 A2
21 mA
–0.3
VREF – 0.2 VREF + 0.2
3.6
0.5
VCCI - 0.9 21 21
103
109
10 10
Notes:
1. Currents are measured at 100°C junction temperature and maximum voltage.
2. Currents are measured at 85°C junction temperature.
Figure 2-22 AC Loading
Table 2-102 AC Waveforms, Measuring Points, and Capacitive Loads
Input LOW (V)
Input HIGH (V)
Measuring
Point* (V)
VREF (typ.) (V)
VTT (typ.) (V)
CLOAD (pF)
VREF – 0.2
VREF + 0.2
1.5
1.485
30
Note: Measuring point = Vtrip. See Table 2-22 on page 2-22 for a complete table of trip points.
Test Point
30 pF
25
SSTL3
Class II
VTT
相關(guān)PDF資料
PDF描述
AGLE600V2-FGG256C FPGA, 13824 CLBS, 600000 GATES, PBGA256
AGLE600V2-FGG484C FPGA, 13824 CLBS, 600000 GATES, PBGA256
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