2-48 Revision 13 Timing Characteristics 1.2 V DC Core Voltage 1.2 V LVCMOS Wide Range" />
參數(shù)資料
型號： AGLE600V2-FG484I
廠商： Microsemi SoC
文件頁數(shù)： 126/166頁
文件大?。?/td> 0K
描述： IC FPGA 1KB FLASH 600K 484-FBGA
標(biāo)準(zhǔn)包裝： 60
系列： IGLOOe
邏輯元件/單元數(shù)： 13824
RAM 位總計： 110592
輸入/輸出數(shù)： 270
門數(shù)： 600000
電源電壓： 1.14 V ~ 1.575 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 85°C
封裝/外殼： 484-BGA
供應(yīng)商設(shè)備封裝： 484-FPBGA（23x23）
IGLOOe DC and Switching Characteristics
2-48
Revision 13
Timing Characteristics
1.2 V DC Core Voltage
1.2 V LVCMOS Wide Range
Timing Characteristics
Refer to LVCMOS 1.2 V (normal range) "Timing Characteristics" on page 2-48 for worst-case timing.
Table 2-66 1.2 LVCMOS Low Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.14 V
Drive Strength
Speed
Grade tDOUT tDP tDIN tPY tPYS tEOUT tZL
tZH
tLZ
tHZ
tZLS
tZHS Units
2 mA
Std.
1.55
9.92 0.26 2.09 2.95
1.10
9.53 7.48 4.02
3.67
15.31 13.26
ns
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-6 for derating values.
Table 2-67 1.2 LVCMOS High Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.14 V
Drive Strength
Speed
Grade tDOUT tDP tDIN tPY tPYS tEOUT tZL
tZH
tLZ
tHZ
tZLS
tZHS Units
2 mA
Std.
1.55
4.06 0.26 2.09 2.95
1.10
3.92 3.46 4.01
3.79
9.71
9.24
ns
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-6 for derating values.
Table 2-68 Minimum and Maximum DC Input and Output Levels
1.2 V LVCMOS
Wide Range1
VIL
VIH
VOL
VOH
IOL IOH IOSH IOSL IIL2 IIH3
Drive
Strength
Equivalent
Software
Default
Drive
Strength
Option4
Min.
(V)
Max.
(V)
Min.
(V)
Max
(V)
Max.
(V)
Min.
(V)
A A
Max.
(mA)5
Max.
(mA)5 A6 A6
100 A
2 mA
–0.3 0.35 * VCCI 0.65 * VCCI 3.6 0.25 * VCCI 0.75 * VCCI 100 100
20
26
10 10
Notes:
1. Applicable to V2 devices ONLY.
2. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
3. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI . Input current is
larger when operating outside recommended ranges.
4. The minimum drive strength for any LVCMOS 1.2 V software configuration when run in wide range is ±100 A. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
5. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
6. Currents are measured at 85°C junction temperature.
7. Software default selection highlighted in gray.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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AGLE600V2-FGG256 功能描述:IC FPGA 1KB FLASH 600K 256-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:IGLOOe 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計:- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA（27X27）
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