參數(shù)資料
型號(hào): AGLN125V5-QN100I
元件分類: FPGA
英文描述: FPGA, PBCC100
封裝: 8 X 8 MM, 0.85 HEIGHT, 0.50 MM PITCH, QFN-100
文件頁數(shù): 30/114頁
文件大?。?/td> 3991K
代理商: AGLN125V5-QN100I
IGLOO nano DC and Switching Characteristics
2- 8
A d vance v0.2
Table 2-10 Quiescent Supply Current (IDD) Characteristics, IGLOO nano Shutdown Mode (VCC, VCCI = 0 V)*
Core Voltage
AGLN010
AGLN015
AGLN020
AGLN060
AGLN125
AGLN250
Units
Typical
(25°C)
1.2 V / 1.5 V
0
A
* IDD includes VCC, VPUMP, VCCI, and VCCPLL currents.
Table 2-11 Quiescent Supply Current (IDD), No IGLOO nano Flash*Freeze Mode
1
Core
Voltage
AGLN010 AGLN015 AGLN020 AGLN060 AGLN125 AGLN250 Units
ICCA Current
2
Typical (25°C)
1.2 V
3.7
5
10
13
18
A
1.5 V
8
14
20
28
44
A
ICCI or IJTAG Current
3
VCCI / VJTAG = 1.2 V (per bank)
Typical (25°C)
1.2 V
1.7
A
VCCI / VJTAG = 1.5 V (per bank)
Typical (25°C)
1.2 V / 1.5 V
1.8
A
VCCI / VJTAG = 1.8 V (per bank)
Typical (25°C)
1.2 V / 1.5 V
1.9
A
VCCI / VJTAG = 2.5 V (per bank)
Typical (25°C)
1.2 V / 1.5 V
2.2
A
VCCI / VJTAG = 3.3 V (per bank)
Typical (25°C)
1.2 V / 1.5 V
2.5
A
Notes:
1. To calculate total device IDD, multiply the number of banks used by ICCI and add ICCA contribution.
2. Includes VCC, VCCPLL, and VPUMP currents.
3. Per VCCI or VJTAG bank
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