參數(shù)資料
型號: AGLN250V2-FCSG81
元件分類: FPGA
英文描述: FPGA, PBGA81
封裝: 5 X 5 MM, 0.80 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, CSP-81
文件頁數(shù): 26/114頁
文件大?。?/td> 3991K
代理商: AGLN250V2-FCSG81
IGLOO nano DC and Switching Characteristics
Ad vance v0.2
2-5
Figure 2-2 V2 Devices – I/O State as a Function of VCCI and VCC Voltage Levels
Region 1: I/O buffers are OFF
Region 2: I/O buffers are ON.
I/Os are functional (except differential inputs)
but slower because V
CCI
/V
CC
are below
specification. For the same reason, input
buffers do not meet V
IH
/V
IL
levels, and
output buffers do not meet V
OH
/V
OL
levels.
Min V
CCI datasheet specification
voltage at a selected I/O
standard; i.e., 1.14 V,1.425 V, 1.7 V,
2.3 V, or 3.0 V
VCC
VCC = 1.14 V
Region 1: I/O Buffers are OFF
Activation trip point:
Va = 0.85 V ± 0.2 V
Deactivation trip point:
Vd = 0.75 V ± 0.2 V
Activation trip point:
Va = 0.9 V ± 0.15 V
Deactivation trip point:
Vd = 0.8 V ± 0.15 V
VCC = 1.575 V
Region 5: I/O buffers are ON
and power supplies are within
specification.
I/Os meet the entire datasheet
and timer specifications for
speed, V
IH
/V
IL
, V
OH
/V
OL
, etc.
Region 4: I/O
buffers are ON.
I/Os are functional
(except differential
but slower because V
CCI is
below specification. For the
same reason, input buffers do not
meet V
IH
/V
IL
levels, and output
buffers do not meet V
OH
/V
OL
levels.
Region 4: I/O
buffers are ON.
I/Os are functional
(except differential inputs)
where VT can be from 0.58 V to 0.9 V (typically 0.75 V)
VCCI
Region 3: I/O buffers are ON.
I/Os are functional; I/O DC
specifications are met,
but I/Os are slower because
the V
CC
is below specification.
V
CC = VCCI + VT
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