Revision 17 2-39 1.2 V LVCMOS (JESD8-12A) Low-Voltage CMOS for 1.2 V complies with the LVCMOS standard JES" />
參數(shù)資料
型號： AGLN250V5-CSG81
廠商： Microsemi SoC
文件頁數(shù)： 102/150頁
文件大?。?/td> 0K
描述： IC FPGA NANO 1KB 250K 81-CSP
標(biāo)準(zhǔn)包裝： 640
系列： IGLOO nano
邏輯元件/單元數(shù)： 6144
RAM 位總計： 36864
輸入/輸出數(shù)： 60
門數(shù)： 250000
電源電壓： 1.425 V ~ 1.575 V
安裝類型： 表面貼裝
工作溫度： -20°C ~ 70°C
封裝/外殼： 81-WFBGA，CSBGA
供應(yīng)商設(shè)備封裝： 81-CSP（5x5）
IGLOO nano Low Power Flash FPGAs
Revision 17
2-39
1.2 V LVCMOS (JESD8-12A)
Low-Voltage CMOS for 1.2 V complies with the LVCMOS standard JESD8-12A for general purpose 1.2 V
applications. It uses a 1.2 V input buffer and a push-pull output buffer.
Timing Characteristics
Applies to 1.2 V DC Core Voltage
Table 2-63 Minimum and Maximum DC Input and Output Levels
1.2 V
LVCMOS
VIL
VIH
VOL
VOH
IOL IOH IOSL
IOSH IIL 1 IIH 2
Drive
Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VmA mA
Max.
mA3
Max.
mA3
A4 A4
1 mA
–0.3 0.35 * VCCI 0.65 * VCCI
3.6
0.25 * VCCI 0.75 * VCCI 1
1
10
13
10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operating conditions where –0.3 < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions where VIH < VIN < VCCI. Input
current is larger when operating outside recommended ranges.
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Software default selection highlighted in gray.
Figure 2-11 AC Loading
Table 2-64 1.2 V LVCMOS AC Waveforms, Measuring Points, and Capacitive Loads
Input LOW (V)
Input HIGH (V)
Measuring Point* (V)
CLOAD (pF)
01.2
0.6
5
Note: *Measuring point = Vtrip. See Table 2-23 on page 2-20 for a complete table of trip points.
Test Point
Enable Path
Datapath
5 pF
R = 1 k
R to VCCI for tLZ / tZL / tZLS
R to GND for tHZ / tZH / tZHS
5 pF for tZH / tZHS / tZL / tZLS
5 pF for tHZ / tLZ
Table 2-65 1.2 V LVCMOS Low Slew
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.14 V
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
1 mA
STD
1.55
8.30
0.26 1.56
2.27
1.10
7.97 7.54 2.56 2.55
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
Table 2-66 1.2 V LVCMOS High Slew
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.14 V
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
1 mA
STD
1.55
3.50 0.26 1.56
2.27
1.10
3.37 3.10 2.55 2.66
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
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