2-36 Revision 16 1.5 V LVCMOS (JESD8-11) Low-Voltage CMOS for 1.5 V is an extension of the LVCM" />
參數(shù)資料
型號: AGLP060V2-CSG289
廠商: Microsemi SoC
文件頁數(shù): 81/134頁
文件大?。?/td> 0K
描述: IC FPGA IGLOO PLUS 60K 289-CSP
標準包裝: 152
系列: IGLOO PLUS
邏輯元件/單元數(shù): 1584
RAM 位總計: 18432
輸入/輸出數(shù): 157
門數(shù): 60000
電源電壓: 1.14 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 70°C
封裝/外殼: 289-TFBGA,CSBGA
供應商設備封裝: 289-CSP(14x14)
IGLOO PLUS DC and Switching Characteristics
2-36
Revision 16
1.5 V LVCMOS (JESD8-11)
Low-Voltage CMOS for 1.5 V is an extension of the LVCMOS standard (JESD8-5) used for general-
purpose 1.5 V applications. It uses a 1.5 V input buffer and a push-pull output buffer.
Table 2-58 Minimum and Maximum DC Input and Output Levels
1.5 V
LVCMOS
VIL
VIH
VOL
VOH
IOL IOH IOSL
IOSH IIL1 IIH2
Drive
Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VmA mA
Max.
mA3
Max.
mA3
A4 A4
2 mA
–0.3 0.35 * VCCI
0.7 * VCCI
3.6
0.25 * VCCI 0.75 * VCCI 2
2
13
16
10 10
4 mA
–0.3 0.35 * VCCI
0.7 * VCCI
3.6
0.25 * VCCI 0.75 * VCCI 4
4
25
33
10 10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges.
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Software default selection highlighted in gray.
Figure 2-10 AC Loading
Table 2-59 AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
CLOAD (pF)
01.5
0.75
5
Note: *Measuring point = Vtrip. See Table 2-23 on page 2-21 for a complete table of trip points.
Test Point
Enable Path
Datapath
5 pF
R = 1 k
R to VCCI for tLZ / tZL / tZLS
R to GND for tHZ / tZH / tZHS
5 pF for tZH / tZHS / tZL / tZLS
5 pF for tHZ / tLZ
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