參數(shù)資料
型號(hào)： AK4529VQ
英文描述： Converter IC
中文描述： 轉(zhuǎn)換器IC
文件頁(yè)數(shù)： 30/38頁(yè)
文件大?。?/td> 382K
代理商： AK4529VQ
ASAHI KASEI
[AK4529]
MS0082-E-00
2001/3
- 30 -
Addr
01H
Register Name
Control 2
Default
D7
0
0
D6
0
0
D5
D4
D3
D2
DFS
0
D1
D0
0
0
LOOP1
0
LOOP0
0
SDOS
0
ACKS
0
ACKS: Master Clock Frequency Auto Setting Mode Enable
0: Disable, Manual Setting Mode
1: Enable, Auto Setting Mode
Master clock frequency is detected automatically at ACKS bit “1”. In this case, the setting of DFS are
ignored. When this bit is “0”, DFS sets the sampling speed mode.
DFS: Sampling speed mode (see table 1.)
0: Normal speed
1: Double speed
Register bit of DFS is ORed with DFS pin if P/S = “L”.
The setting of DFS is ignored at ACKS bit “1”.
SDOS: SDTO source select
0: ADC
1: DAUX
Register bit of SDOS is ORed with SDOS pin if P/S = “L”.
SDOS should be set to “0” at TDM bit “1”.
LOOP1-0: Loopback mode enable
00: Normal (No loop back)
01: LIN
→
LOUT1, LOUT2, LOUT3, LOUT4
RIN
→
ROUT1, ROUT2, ROUT3, ROUT4
The digital ADC output (DAUX input if SDOS = “1”) is connected to the digital DAC input. In this
mode, the input DAC data to SDTI1-3 is ignored. The audio format of SDTO at loopback mode
becomes mode 2 at mode 0, and mode 3 at mode 1, respectively.
10: SDTI1(L)
→
SDTI2(L), SDTI3(L), SDTI4(L)
SDTI1(R)
→
SDTI2(R), SDTI3(R), SDTI4(R)
In this mode the input DAC data to SDTI2-4 is ignored.
11: N/A
LOOP1-0 should be set to “00” at TDM bit “1”.
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