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參數(shù)資料
| 型號： | AK4641VN |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | 16 BIT CODEC WITH BLUETOOTH INTERFACE |
| 中文描述： | 16位編解碼器與藍(lán)牙接口 |
| 文件頁數(shù)： | 38/51頁 |
| 文件大?。?/td> | 461K |
| 代理商： | AK4641VN |
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ASAHI KASEI
[AK4641]
MS0301-E-00
2004/05
- 43 -
Addr
Register Name
D7
D6
D5
D4
D3
D2
D1
D0
09H
ALC Mode Control 1
0
ALC1
ZELM
LMAT1
LMAT0
RATT
LMTH
R/W
RD
R/W
Default
0
LMTH: ALC1 Limiter Detection Level / Recovery Waiting Counter Reset Level
The ALC1 limiter detection level and the ALC1 recovery counter reset level may be offset by about
±2dB.
LMTH
ALC1 Limiter Detection Level
ALC1 Recovery Waiting Counter Reset Level
0
ADC Input
≥ 6.0dBFS
6.0dB > ADC Input ≥ 8.0dBFS
Default
1
ADC Input
≥ 4.0dBFS
4.0dB > ADC Input ≥ 6.0dBFS
Table 20. ALC1 Limiter Detection Level / Recovery Waiting Counter Reset Level
RATT: ALC1 Recovery GAIN Step
During the ALC1 Recovery operation, the number of steps changed from current IPGA value is set. For example,
when the current IPGA value is “30H” and RATT bit = “1” is set, IPGA changes to “32H” by the ALC1 recovery
operation, the output signal level is gained up by 1dB (=0.5dB x 2).
When the IPGA value exceeds the reference level (REF6-0 bits), the IPGA value does not increase.
RATT
GAIN STEP
0
1
Default
1
2
Table 21. ALC1 Recovery Gain Step Setting
LMAT1-0: ALC1 Limiter ATT Step
During the ALC1 limiter operation, when either Lch or Rch exceeds the ALC1 limiter detection level set by
LMTH, the number of steps attenuated from the current IPGA value is set. For example, when the current IPGA
value is 47H and the LMAT1-0 bits = “11”, the IPGA transition to “43H” when the ALC1 limiter operation starts,
resulting in the input signal level being attenuated by 2dB (=0.5dB x 4). When the attenuation value exceeds IPGA
= “00H” (
8dB), it clips to “00H”.
LMAT1
LMAT0
ATT STEP
0
1
Default
0
1
2
1
0
3
1
4
Table 22. ALC1 Limiter ATT Step Setting
ZELM: Enable zero crossing detection at ALC1 Limiter operation
0: Enable (Default)
1: Disable
When the ZELM bit = “0”, the IPGA of each L/R channel perform a zero crossing or timeout independently and
the IPGA value is changed by the ALC1 operation. The zero crossing timeout is the same as the ALC1 recovery
operation. When the ZELM bit = “1”, the IPGA value is changed immediately.
ALC1: ALC1 Enable
0: ALC1 Disable (Default)
1: ALC1 Enable
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| AK4642 | 制造商:AKM 制造商全稱:AKM 功能描述:16-Bit ???￡ Stereo CODEC with MIC/HP/SPK-AMP |
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| AK4643 | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with built-in MIC/HP/RCV/SPK amplifier |
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