參數(shù)資料
型號： AM29BDD160GB17AKI
廠商： Advanced Micro Devices, Inc.
英文描述： 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
中文描述： 16兆位（1 M中的x 16-bit/512畝× 32位），2.5伏的CMOS只突發(fā)模式，雙啟動，同步讀/寫閃存
文件頁數(shù)： 6/79頁
文件大?。?/td> 1368K
代理商： AM29BDD160GB17AKI
4
Am29BDD160G
June 7, 2006
All PPB Erase Command .......................................................43
DYB Write ...............................................................................43
PPB Lock Bit Set ....................................................................43
DYB Status .............................................................................43
PPB Status .............................................................................44
PPB Lock Bit Status ...............................................................44
Non-volatile Protection Bit Program And Erase Flow .............44
Table 19. Memory Array Command Definitions (x32 Mode) ...........45
Table 20. Sector Protection Command Definitions (x32 Mode) ......46
Table 21. Memory Array Command Definitions (x16 Mode) ...........47
Table 22. Sector Protection Command Definitions (x16 Mode) ......48
DQ7: Data# Polling .................................................................49
RY/BY#: Ready/Busy# ...........................................................49
Figure 6. Data# Polling Algorithm................................................... 50
DQ6: Toggle Bit I ....................................................................50
DQ2: Toggle Bit II ...................................................................50
Reading Toggle Bits DQ6/DQ2 ..............................................51
DQ5: Exceeded Timing Limits ................................................51
Figure 7. Toggle Bit Algorithm......................................................... 51
DQ3: Sector Erase Timer .......................................................52
Table 23. Write Operation Status ....................................................52
Figure 8. Maximum Negative Overshoot Waveform....................... 53
Figure 9. Maximum Positive Overshoot Waveform......................... 53
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Figure 10. I
Current vs. Time (Showing Active and Automatic Sleep
Currents)......................................................................................... 55
Figure 11. Typical I
CC1
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Figure 12. Test Setup...................................................................... 56
Table 24. Test Specifications ..........................................................56
Key to
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Figure 13. Input Waveforms and Measurement Levels................. 56
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Figure 14. VCC and VIO Power-up Diagram................................. 57
Figure 15. Conventional Read Operations Timings....................... 60
Figure 16. Burst Mode Read (x32 Mode)....................................... 60
Figure 17. Asynchronous Command Write Timing........................ 61
Figure 18. Synchronous Command Write/Read Timing................. 61
Figure 19. RESET# Timings.......................................................... 63
Figure 20. WP# Timing.................................................................. 63
Figure 21. Program Operation Timings.......................................... 65
Figure 22. Chip/Sector Erase Operation Timings.......................... 66
Figure 23. Back-to-back Cycle Timings......................................... 66
Figure 24. Data# Polling Timings (During Embedded Algorithms). 67
Figure 25. Toggle Bit Timings (During Embedded Algorithms)...... 67
Figure 26. DQ2 vs. DQ6 for Erase and Erase Suspend Operations...
68
Figure 27. Synchronous Data Polling Timing/Toggle Bit Timings.. 68
Figure 28. Sector Protect/Unprotect Timing Diagram.................... 69
Figure 29. Alternate CE# Controlled Write Operation Timings...... 71
Era
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Latchup Character
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PQFP and Fort
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Data Retent
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Phy
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PQR080–80-Lead Plastic Quad Flat Package .......................73
LAA 080–80-ball Fortified Ball Grid Array (13 x 11 mm) .........74
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