- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄366405 > AM29DL640H70WHI (ADVANCED MICRO DEVICES INC) 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory PDF資料下載
參數(shù)資料
| 型號： | AM29DL640H70WHI |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | PROM |
| 英文描述： | 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory |
| 中文描述： | 4M X 16 FLASH 3V PROM, 70 ns, PBGA63 |
| 封裝： | 12 X 11 MM, 0.80 MM PITCH, FBGA-63 |
| 文件頁數(shù)： | 26/54頁 |
| 文件大?。?/td> | 880K |
| 代理商： | AM29DL640H70WHI |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當(dāng)前第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁
24
Am29DL640H
February 9, 2005
cured Silicon Sector region by issuing the three-cycle
Enter Secured Silicon Sector command sequence.
The device continues to access the Secured Silicon
Sector region until the system issues the four-cycle
Exit Secured Silicon Sector command sequence. The
Exit Secured Silicon Sector command sequence re-
turns the device to normal operation. The Secured Sil-
icon Sector is not accessible when the device is
executing an Embedded Program or embedded Erase
algorithm. Table 12 shows the address and data re-
quirements for both command sequences. See also
“Secured Silicon Sector Flash Memory Region” for fur-
ther information.
Note that the ACC function and un-
lock bypass modes are not available when the
Secured Silicon Sector is enabled.
Byte/Word Program Command Sequence
The system may program the device by word or byte,
depending on the state of the BYTE# pin. Program-
ming is a four-bus-cycle operation. The program com-
mand sequence is initiated by writing two unlock write
cycles, followed by the program set-up command. The
program address and data are written next, which in
turn initiate the Embedded Program algorithm. The
system is
not
required to provide further controls or
timings. The device automatically provides internally
generated program pulses and verifies the pro-
grammed cell margin. Table 12 shows the address and
data requirements for the byte program command se-
quence.
When the Embedded Program algorithm is complete,
that bank then returns to the read mode and ad-
dresses are no longer latched. The system can deter-
mine the status of the program operation by using
DQ7, DQ6, or RY/BY#. Refer to the Write Operation
Status section for information on these status bits.
Any commands written to the device during the Em-
bedded Program Algorithm are ignored.
Note that a
hardware reset
immediately terminates the program
operation. The program command sequence should
be reinitiated once that bank has returned to the read
mode, to ensure data integrity.
Note that the Secured
Silicon Sector, autoselect, and CFI functions are un-
available when a program operation is in progress.
Programming is allowed in any sequence and across
sector boundaries.
A bit cannot be programmed
from “0” back to a “1.”
Attempting to do so may
cause that bank to set DQ5 = 1, or cause the DQ7 and
DQ6 status bits to indicate the operation was success-
ful. However, a succeeding read will show that the
data is still “0.” Only erase operations can convert a “0”
to a “1.”
Unlock Bypass Command Sequence
The unlock bypass feature allows the system to pro-
gram bytes or words to a bank faster than using the
standard program command sequence. The unlock
bypass command sequence is initiated by first writing
two unlock cycles. This is followed by a third write
cycle containing the unlock bypass command, 20h.
That bank then enters the unlock bypass mode. A
two-cycle unlock bypass program command sequence
is all that is required to program in this mode. The first
cycle in this sequence contains the unlock bypass pro-
gram command, A0h; the second cycle contains the
program address and data. Additional data is pro-
grammed in the same manner. This mode dispenses
with the initial two unlock cycles required in the stan-
dard program command sequence, resulting in faster
total programming time. Table 12 shows the require-
ments for the command sequence.
During the unlock bypass mode, only the Unlock By-
pass Program and Unlock Bypass Reset commands
are valid. To exit the unlock bypass mode, the system
must issue the two-cycle unlock bypass reset com-
mand sequence. (See Table 12).
The device offers accelerated program operations
through the WP#/ACC pin. When the system asserts
V
HH
on the WP#/ACC pin, the device automatically en-
ters the Unlock Bypass mode. The system may then
write the two-cycle Unlock Bypass program command
sequence. The device uses the higher voltage on the
WP#/ACC pin to accelerate the operation.
Note that
the WP#/ACC pin must not be at V
HH
for any operation
other than accelerated programming, or device dam-
age may result. In addition, the WP#/ACC pin must not
be left floating or unconnected; inconsistent behavior
of the device may result
.
Figure 4 illustrates the algorithm for the program oper-
ation. Refer to the Erase and Program Operations
table in the AC Characteristics section for parameters,
and Figure 18 for timing diagrams.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM29DL640H70WHIN | 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory |
| AM29DL640H60WHE | 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory |
| AM29DL640H90WHE | 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory |
| AM29DL640H60WHEN | 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory |
| AM29DL640H60WHI | 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM29DL800BB-120WBD | 制造商:Spansion 功能描述:NOR Flash Parallel 3V/3.3V 8Mbit 1M/512K x 8bit/16bit 120ns 48-Pin FBGA |
| AM29DL800BB-70SI | 制造商:Spansion 功能描述:FLASH PARALLEL 3V/3.3V 8MBIT 1MX8/512KX16 70NS 44SOIC - Trays |
| AM29DL800BB-90EI | 制造商:Spansion 功能描述:NOR Flash Parallel 3V/3.3V 8Mbit 1M/512K x 8bit/16bit 90ns 48-Pin TSOP |
| AM29DL800BT-120EC | 制造商:Spansion 功能描述:SPZAM29DL800BT-120EC TB 120n EOL160610 |
| AM29DL800BT-120WBC | 制造商:Advanced Micro Devices 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。