參數(shù)資料
型號(hào): AM29LV160MT100FI
廠商: Advanced Micro Devices, Inc.
英文描述: 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) MirrorBit 3.0 Volt-only Boot Sector Flash Memory
中文描述: 16兆位(2米× 8位/ 1個(gè)M x 16位),3.0伏的MirrorBit只引導(dǎo)扇區(qū)閃存
文件頁(yè)數(shù): 26/60頁(yè)
文件大小: 1849K
代理商: AM29LV160MT100FI
24
Am29LV160M
25974B0 August 11, 2003
P r e l i m i n a r y
The reset command may be written between the sequence cycles in an autoselect
command sequence. Once in the autoselect mode, the reset command
must
be
written to return to reading array data (also applies to autoselect during Erase
Suspend).
If DQ5 goes high during a program or erase operation, writing the reset command
returns the device to reading array data (also applies during Erase Suspend).
Autoselect Command Sequence
The autoselect command sequence allows the host system to access the manu-
facturer and devices codes, and determine whether or not a sector is protected.
Tables
10
11
show the address and data requirements. This method is an alter-
native to that shown in Table
4
, which is intended for PROM programmers and
requires V
ID
on address bit A9.
The autoselect command sequence is initiated by writing two unlock cycles, fol-
lowed by the autoselect command. The device then enters the autoselect mode,
and the system may read at any address any number of times, without initiating
another command sequence.
A read cycle at address XX00h retrieves the manufacturer code. A read cycle at
address XX01h returns the device code. A read cycle containing a sector address
(SA) and the address XX02h in word mode (or XX04h in byte mode) returns
XX01h if that sector is protected, or 00h if it is unprotected. Refer to Tables
2
and
3
for valid sector addresses.
The system must write the reset command to exit the autoselect mode and return
to reading array data.
Word/Byte Program Command Sequence
The system may program the device by word or byte, depending on the state
of the BYTE# pin. Programming is a four-bus-cycle operation. The program
command sequence is initiated by writing two unlock write cycles, followed by
the program set-up command. The program address and data are written next,
which in turn initiate the Embedded Program algorithm. The system is
not
re-
quired to provide further controls or timings. The device automatically
generates the program pulses and verifies the programmed cell margin. Tables
10
11
show the address and data requirements for the byte program command
sequence.
Note that the SecSi Sector, autoselect, and CFI functions are un-
available when a program operation is in progress.
When the Embedded Program algorithm is complete, the device then returns to
reading array data and addresses are no longer latched. The system can deter-
mine the status of the program operation by using DQ7, DQ6, or RY/BY#. See
“Write Operation Status”
for information on these status bits.
Any commands written to the device during the Embedded Program Algorithm
are ignored. Note that a
hardw are reset
immediately terminates the program-
ming operation. The Byte Program command sequence should be reinitiated once
the device has reset to reading array data, to ensure data integrity.
Programming is allowed in any sequence and across sector boundaries.
A bit
cannot be programmed from a “ 0” back to a “ 1” .
Attempting to do so may
halt the operation and set DQ5 to “1,” or cause the Data# Polling algorithm to
indicate the operation was successful. However, a succeeding read will show that
the data is still “0”. Only erase operations can convert a “0” to a “1”.
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