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參數資料
| 型號： | AM29LV200BT-90SK |
| 廠商： | Advanced Micro Devices, Inc. |
| 元件分類： | FLASH |
| 英文描述： | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| 中文描述： | 2兆位（256Kx8Bit/128Kx16位），3.0伏的CMOS引導扇區(qū)閃存 |
| 文件頁數： | 45/46頁 |
| 文件大小： | 716K |
| 代理商： | AM29LV200BT-90SK |
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October 10, 2006 21521D6
Am29LV200B
43
D AT A S H E E T
REVISION SUMMARY
Revision A (January 1998)
Initial release.
Revision B (July 1998)
Global
Expanded data sheet from Advanced Information to
Preliminary version.
Distinctive Characteristics
Changed “Manufactured on 0.35 μm process technology”
to “Manufactured on 0.32 μm process technology”.
General Description
Second paragraph:
Changed “This device is manufac-
tured using AMD’s 0.35 μm process technology” to
“This device is manufactured using AMD’s 0.32 μm
process technology”.
Revision C (January 1999)
Global
Deleted the 80 ns speed option. Added the -50R and
-55R speed options.
Distinctive Characteristics
Added 20-year data retention subbullet.
Connection Diagrams
Reverse TSOP
: Moved the circle marking to upper right
corner from the upper left corner, added an upside
down triangle marking to the upper left corner.
Ordering Information
Package Type:
Added “
S = 44-Pin Small Outline Package
(SO 044)”.
DC Characteristics—CMOS Compatible
I
CC1
, I
CC2
, I
CC3
, I
CC
4
: Added Note “Maximum I
CC
spec-
ifications are tested with V
CC
= V
CCmax
.
AC Characteristics—Alternate CE# Controlled
Erase/Program Operations
Corrected speed options.
Erase and Programming Performance
Chip Erase Time
: Changed Typical value to 5 s from
7 s.
Chip Programming Time
: Changed Max value for Byte
Mode to 6.9 s from 6.8 s. Changed Max value for Word
Mode to 4.5 s from 4.3 s.
Note 2
: Added “(3.0 V for regulated speed options)”.
Revision C+1 (March 27, 1999)
Ordering Information
Corrected the example part number to include the “R”
after “-50.”
Operating Ranges
The V
CC
supply voltage for regulated devices is 3.0–
3.6 V. The V
CC
supply voltage for full voltage range
devices is 2.7–3.6 V.
Revision C+2 (May 17, 1999)
Ordering Information
Boot Code Sector Architecture
: Added “B = Bottom
Sector”.
Revision C+3 (June 1, 1999)
Physical Dimensions
TS 048:
The drawing previously showed the TSR 048
package; now shows the proper package.
Revision C+4 (July 2, 1999)
Global
Deleted references to the 50R speed option.
Revision C+5 (August 25, 1999)
Ordering Information
Valid Combinations:
Restored package options for
Am29LV200BT-70 and Am29LV200BB-70.
Revision D (November 18, 1999)
AC Characteristics—Figure 17. Program
Operations Timing and Figure 18. Chip/Sector
Erase Operations
Deleted t
GHWL
and changed OE# waveform to start at
high.
Physical Dimensions
Replaced figures with more detailed illustrations.
Revision D+1 (November 13, 2000)
Global
Added table of contents. Deleted burn-in option from
Ordering Information section.
Revision D+2 (April 12, 2002)
Global
Added FBA048 package.
Revision D+3 (June 11, 2004)
Ordering Information
Added Pb-free packages.
Revision D+4 (September 20, 2005)
Corrected Valid Combinations table.
Revision D+5 (January 4, 2006)
Removed TSR048 48-pin Reverse TSOP option.
相關PDF資料 |
PDF描述 |
|---|---|
| AM29LV200BT-90WAC | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| AM29LV200BT-90WAD | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| AM29LV200BB-120EF | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| AM29LV200BB-120EK | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| AM29LV200BB-120SD | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
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| AM29LV320DB120EI | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 32M-Bit 4M x 8/2M x 16 120ns 48-Pin TSOP |
| AM29LV320DB120WMI | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 32M-Bit 4M x 8/2M x 16 120ns 48-Pin FBGA |
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