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Am29LV320D
December 14, 2005
D A T A S H E E T
GENERAL DESCRIPTION
The Am29LV320D is a 32 megabit, 3.0 volt-only flash
memory device, organized as 2,097,152 words of 16
bits each or 4,194,304 bytes of 8 bits each. Word
mode data appears on DQ0–DQ15; byte mode data
appears on DQ0–DQ7. The device is designed to be
programmed in-system with the standard 3.0 volt V
CC
supply, and can also be programmed in standard
EPROM programmers.
The device is available with an access time of 90 or
120 ns. The devices are offered in 48-pin TSOP and
48-ball FBGA packages. Standard control pins—chip
enable (CE#), write enable (WE#), and output enable
(OE#)—control normal read and write operations, and
avoid bus contention issues.
The device requires only a
single 3.0 volt power sup-
ply
for both read and write functions. Internally gener-
ated and regulated voltages are provided for the
program and erase operations.
Am29LV320D Features
The
Secured Silicon sector
is an extra sector capa-
ble of being permanently locked by AMD or custom-
ers. The
Secured Silicon Indicator Bit
(DQ7) is
permanently set to a 1 if the part is
factory
locked
,
and set to a 0 if
customer lockable
. This way, cus-
tomer lockable parts can never be used to replace a
factory locked part.
Note that the Am29LV320D has
a Secured Silicon sector size of 64 Kbytes. AMD
devices designated as replacements or substi-
tutes, such as the Am29LV320M, have 256 bytes.
This should be considered during system design.
Factory locked parts provide several options. The Se-
cured Silicon sector
may store a secure, random 16
byte ESN (Electronic Serial Number), customer code
(programmed through AMD’s ExpressFlash service),
or both. Customer Lockable parts may utilize the Se-
cured Silicon sector as bonus space, reading and writ-
ing like any other flash sector, or may permanently
lock their own code there.
The device offers complete compatibility with the
JEDEC single-power-supply Flash command set
standard
. Commands are written to the command
register using standard microprocessor write timings.
Reading data out of the device is similar to reading
from other Flash or EPROM devices.
The host system can detect whether a program or
erase operation is complete by using the device
sta-
tus bits:
RY/BY# pin, DQ7 (Data# Polling) and
DQ6/DQ2 (toggle bits). After a program or erase cycle
is completed, the device automatically returns to the
read mode.
The
sector erase architecture
allows memory sec-
tors to be erased and reprogrammed without affecting
the data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection
measures include a low
V
CC
detector that automatically inhibits write opera-
tions during power transitions. The
hardware sector
protection
feature disables both program and erase
operations in any combination of the sectors of mem-
ory. This can be achieved in-system or via program-
ming equipment.
The device offers two power-saving features. When
addresses are stable for a specified amount of time,
the device enters the
automatic sleep mode
. The
system can also place the device into the
standby
mode
. Power consumption is greatly reduced in both
modes.