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參數(shù)資料
| 型號(hào)： | Am29LV640DL90RZE |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 8 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor |
| 中文描述： | 64兆位（4個(gè)M x 16位），3.0伏的CMOS只均勻部門閃光控制記憶與VersatileI |
| 文件頁數(shù)： | 53/57頁 |
| 文件大?。?/td> | 1467K |
| 代理商： | AM29LV640DL90RZE |
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56
Am29LV640D/Am29LV641D
September 20, 2002
Test Conditions
Test Conditions table: Redefined output timing mea-
surement reference level as 0.5 V
IO.
Added note to table and figure.
Erase and Program Opeations table, Alternate CE#
Controlled Erase and Program Operations table,
Erase and Programming Performance table
Changed the typical sector erase time to 1.6 s.
AC Characteristics—Figure 15. Program
Operations Timing and Figure 17. Chip/Sector
Erase Operations
Deleted t
GHWL and changed OE# waveform to start at
high.
Physical Dimensions
Replaced figures with more detailed illustrations.
Revision B+1 (August 4, 2000)
Global
Added trademarks for SecSi Sector.
Accelerated Program Operation (page 12), Unlock
Bypass Command Sequence (page 26)
Added caution note regarding ACC pin.
Absolute Maximum Ratings
Corrected the maximum voltage on V
IO to +5.5V.
DC Characteristics table
Added WP# = V
IH to test conditions for standby cur-
rents I
CC3, ICC4, ICC5.
Revision B+2 (October 18, 2000)
Distinctive Characteristics
Corrected package options for 56-pin SSOP as being
available on Am29LV640DH/DL only.
Revision B+3 (January 18, 2001)
Global
Deleted “Preliminary” status from document.
General Description
In the second paragraph, corrected references to V
IO
voltage ranges. The 90 and 120 speeds are available
where V
IO ≥ VCC, and 100 and 120 ns speeds are avail-
able where V
IO < VCC.
Revision B+4 (March 8, 2001)
Corrected the sector group address bits for sectors
64–127.
Revision B+5 (October 11, 2001)
Connection Diagrams, Ordering Information,
Physical Dimensions
Added 64-ball Fortified BGA package information.
Revision B+6 (January 10, 2002)
Global
Clarified description of VersatileIO (V
IO) in the follow-
ing sections: Distinctive Characteristics; General De-
scription; VersatileIO (V
IO) Control; Operating Ranges;
DC Characteristics; CMOS compatible.
Reduced typical sector erase time from 1.6 s to 0.9 s.
DC Characteristics
Changed minimum V
OH1 from 0.85VIO to 0.8VIO. De-
leted reference to Note 6 for both V
OH1 and VOH2.
Erase and Program Performance table
Reduced typical sector erase time from 1.6 s to 0.9 s.
Changed typical chip program time from 90 s to 115 s.
Revision B+7 (April 15, 2002)
Ordering Information
Added N designator for Fortified BGA package mark-
ings.
Common Flash Interface (CFI)
Revised data value at address 44h. Clarified descrip-
tion of data for addresses 45–47h, 49, 4A, 4D–4Fh.
Clarified and combined Notes 4 and 5 into Note 4.
Revision B+8 (September 20, 2002)
Sector Erase Command Sequence
Changed sentence arrangement in fourth paragraph.
Trademarks
Copyright 2002 Advanced Micro Devices, Inc. All rights reserved.
AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc.
ExpressFlash is a trademark of Advanced Micro Devices, Inc.
Product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
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| AM29LV640DL90RZI | 制造商:Advanced Micro Devices 功能描述: |
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| AM29LV640DU-90RWHIT | 制造商:Advanced Micro Devices 功能描述:63-BALL FINE-PITCH BALL GRID ARRAY (FBGA) 0.80 MM PITCH, 11 X 12 MM PACKAGE (FBE063) |
| AM29LV640MB-90REI | 制造商:Advanced Micro Devices 功能描述: |
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