- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376484 > AM29LV652DU12RMAI (SPANSION LLC) 128 Megabit (16 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO Control PDF資料下載
參數(shù)資料
| 型號(hào)： | AM29LV652DU12RMAI |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | 128 Megabit (16 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO Control |
| 中文描述： | 16M X 8 FLASH 3V PROM, 120 ns, PBGA63 |
| 封裝： | 11 X 12 MM, 0.80 MM PITCH, FBGA-63 |
| 文件頁數(shù)： | 30/55頁 |
| 文件大?。?/td> | 1181K |
| 代理商： | AM29LV652DU12RMAI |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁當(dāng)前第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁
28
Am29LV652D
October 29, 2004
P R E L I M I N A R Y
When the Embedded Erase algorithm is complete, the
device returns to the read mode and addresses are no
longer latched. The system can determine the status
of the erase operation by using DQ7, DQ6, DQ2, or
RY/BY#. Refer to
“Write Operation Status” on page 31
for information on these status bits.
Any commands written during the chip erase operation
are ignored. However, note that a
hardware reset
im-
mediately terminates the erase operation. If that oc-
curs, the chip erase command sequence should be
reinitiated once the device returns to reading array
data, to ensure data integrity.
Figure 4, on page 29
illustrates the algorithm for the
erase operation. Refer to the
“Erase and Program Op-
erations” on page 41
tables in the AC Characteristics
section for parameters, and
Figure 17, on page 43
section for timing diagrams.
Sector Erase Command Sequence
Sector erase is a six bus cycle operation. The sector
erase command sequence is initiated by writing two
unlock cycles, followed by a set-up command. Two ad-
ditional unlock cycles are written, and are then fol-
lowed by the address of the sector to be erased, and
the sector erase command.
Table 10, on page 30
shows the address and data requirements for the sec-
tor erase command sequence.
The device does
not
require the system to preprogram
prior to erase. The Embedded Erase algorithm auto-
matically programs and verifies the entire memory for
an all zero data pattern prior to electrical erase. The
system is not required to provide any controls or tim-
ings during these operations.
After the command sequence is written, a sector erase
time-out of 50 μs occurs. During the time-out period,
additional sector addresses and sector erase com-
mands may be written. Loading the sector erase buffer
may be done in any sequence, and the number of sec-
tors may be from one sector to all sectors. The time
between these additional cycles must be less than 50
μs, otherwise erasure may begin. Any sector erase
address and command following the exceeded
time-out may or may not be accepted. It is recom-
mended that processor interrupts be disabled during
this time to ensure all commands are accepted. The
interrupts can be re-enabled after the last Sector
Erase command is written.
Any command other than
Sector Erase or Erase Suspend during the
time-out period resets the device to the read
mode.
The system must rewrite the command se-
quence and any additional addresses and commands.
The system can monitor DQ3 to determine if the sec-
tor erase timer has timed out (See
“DQ3: Sector Erase
Timer” on page 33
.). The time-out begins from the ris-
ing edge of the final WE# pulse in the command
sequence.
When the Embedded Erase algorithm is complete, the
device returns to reading array data and addresses
are no longer latched. Note that while the Embedded
Erase operation is in progress, the system can read
data from the non-erasing sector. The system can de-
termine the status of the erase operation by reading
DQ7, DQ6, DQ2, or RY/BY# in the erasing sector.
Refer to
“Write Operation Status” on page 31
for infor-
mation on these status bits.
Once the sector erase operation begins, only the
Erase Suspend command is valid. All other com-
mands are ignored. However, note that a
hardware
reset
immediately
terminates the erase operation. If
that occurs, the sector erase command sequence
should be reinitiated once the device returns to read-
ing array data, to ensure data integrity.
Figure 4, on page 29
illustrates the algorithm for the
erase operation. Refer to the
“Erase and Program Op-
erations” on page 41
tables in the AC Characteristics
section for parameters, and
Figure 17, on page 43
section for timing diagrams.
Erase Suspend/Erase Resume
Commands
The Erase Suspend command, B0h, allows the sys-
tem to interrupt a sector erase operation and then read
data from, or program data to, any sector not selected
for erasure. This command is valid only during the
sector erase operation, including the 50 μs time-out
period during the sector erase command sequence.
The Erase Suspend command is ignored if written dur-
ing the chip erase operation or Embedded Program
algorithm.
When the Erase Suspend command is written during
the sector erase operation, the device requires a max-
imum of 20 μs to suspend the erase operation. How-
ever, when the Erase Suspend command is written
during the sector erase time-out, the device immedi-
ately terminates the time-out period and suspends the
erase operation.
After the erase operation is suspended, the device en-
ters the erase-suspend-read mode. The system can
read data from or program data to any sector not se-
lected for erasure. (The device “erase suspends” all
sectors selected for erasure.) Reading at any address
within erase-suspended sectors produces status infor-
mation on DQ7–DQ0. The system can use DQ7, or
DQ6 and DQ2 together, to determine if a sector is ac-
tively erasing or is erase-suspended. Refer to
“Write
Operation Status” on page 31
for information on these
status bits.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM29LV652DU12RMAK | 128 Megabit (16 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO Control |
| AM29LV652D | 128 Megabit (16 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO Control |
| AM29LV652DU12RMAE | 128 Megabit (16 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO Control |
| AM29LV652DU12RMAF | 128 Megabit (16 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO Control |
| AM29LV652DU90RMAK | 128 Megabit (16 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO Control |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM29LV800B-120DGC1 | 制造商:Spansion 功能描述:3V 8M FLASH KNOWN GOOD DIE W/BOTTOM BOOT (COMMERCIAL TEMP) - Gel-pak, waffle pack, wafer, diced wafer on film |
| AM29LV800BB | 制造商:Advanced Micro Devices 功能描述: |
| AM29LV800BB120EC | 制造商:AMD 功能描述:* |
| AM29LV800BB-120EC | 制造商:Advanced Micro Devices 功能描述: |
| AM29LV800BB-120EI | 制造商:Advanced Micro Devices 功能描述:NOR Flash, 512K x 16, 48 Pin, Plastic, TSSOP |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。