參數(shù)資料
型號(hào)： AM29LV652DU90RMAI
廠(chǎng)商： SPANSION LLC
元件分類(lèi)： DRAM
英文描述： Varistor; Package/Case:0805; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes; Supply Voltage Max:14V; Output Current Max:0.75A; Output Voltage Max:32V
中文描述： 16M X 8 FLASH 3V PROM, 90 ns, PBGA63
封裝： 11 X 12 MM, 0.80 MM PITCH, FBGA-63
文件頁(yè)數(shù)： 28/55頁(yè)
文件大?。?/td> 1181K
代理商： AM29LV652DU90RMAI
26
Am29LV652D
October 29, 2004
P R E L I M I N A R Y
See the next section,
“Reset Command”
, for more in-
formation.
See also
“VersatileIO
(V
IO
) Control” on page 9
for
more information. The Read-Only Operations table
provides the read parameters, and
Figure 13, on page
39
shows the timing diagram.
Reset Command
Writing the reset command resets the device to the
read or erase-suspend-read mode. Address bits are
don’t cares for this command.
The reset command may be written between the se-
quence cycles in an erase command sequence before
erasing begins. This resets the device to the read
mode. Once erasure begins, however, the device ig-
nores reset commands until the operation is complete.
The reset command may be written between the
sequence cycles in a program command sequence
before programming begins. This resets the device to
the read mode. If the program command sequence is
written while the device is in the Erase Suspend mode,
writing the reset command returns the device to the
erase-suspend-read mode. Once programming be-
gins, however, the device ignores reset commands
until the operation is complete.
The reset command may be written between the se-
quence cycles in an autoselect command sequence.
Once in the autoselect mode, the reset command
must be written to return to the read mode. If the de-
vice entered the autoselect mode while in the Erase
Suspend mode, writing the reset command returns the
device to the erase-suspend-read mode.
If DQ5 goes high during a program or erase operation,
writing the reset command returns the device to the
read mode (or erase-suspend-read mode if the device
was in Erase Suspend).
Autoselect Command Sequence
The autoselect command sequence allows the host
system to access the manufacturer and device codes,
and determine whether or not a sector is protected.
Table 10, on page 30
shows the address and data re-
quirements. This method is an alternative to that
shown in
Table 4, on page 19
, which is intended for
PROM programmers and requires V
ID
on address A9.
The autoselect command sequence may be written to
an address that is either in the read or
erase-suspend-read mode. The autoselect command
may not be written while the device is actively pro-
gramming or erasing.
The autoselect command sequence is initiated by first
writing two unlock cycles. This is followed by a third
write cycle that contains the autoselect command. The
device then enters the autoselect mode. The system
may read at any address any number of times without
initiating another autoselect command sequence:
■
A read cycle at address XX00h returns the manu-
facturer code.
■
A read cycle at address XX01h returns the device
code.
■
A read cycle to an address containing a sector
group address (SA), and the address 02h on A7–A0
returns 01h if the sector group is protected, or 00h
if it is unprotected. (Refer to
Table 5, on page 20
for
valid sector addresses).
The system must write the reset command to return to
the read mode (or erase-suspend-read mode if the de-
vice was previously in Erase Suspend).
Byte Program Command Sequence
Programming is a four-bus-cycle operation. The pro-
gram command sequence is initiated by writing two
unlock write cycles, followed by the program set-up
command. The program address and data are written
next, which in turn initiate the Embedded Program al-
gorithm. The system is
not
required to provide further
controls or timings. The device automatically provides
internally generated program pulses and verifies the
programmed cell margin.
Table 10, on page 30
shows
the address and data requirements for the byte pro-
gram command sequence.
When the Embedded Program algorithm is complete,
the device then returns to the read mode and ad-
dresses are no longer latched. The system can deter-
mine the status of the program operation by using
DQ7, DQ6, or RY/BY#. Refer to the
“Write Operation
Status” on page 31
section for information on these
status bits.
Any commands written to the device during the Em-
bedded Program Algorithm are ignored.
Note that a
hardware reset
immediately terminates the program
operation. The program command sequence should
be reinitiated once the device returns to the read
mode, to ensure data integrity.
Programming is allowed in any sequence and across
sector boundaries.
A bit cannot be programmed
from “0” back to a “1.”
Attempting to do so may
cause the device to set DQ5 = 1, or cause the DQ7
and DQ6 status bits to indicate the operation was suc-
cessful. However, a succeeding read shows that the
data is still “0.” Only erase operations can convert a
“0” to a “1.”
Unlock Bypass Command Sequence
The unlock bypass feature allows the system to pro-
gram bytes to the device faster than using the stan-
dard program command sequence. The unlock
bypass command sequence is initiated by first writing
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