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參數(shù)資料
| 型號： | AM29PL160CB-65R |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only High Performance Page Mode Flash Memory |
| 中文描述： | 16兆位（2米× 8位/ 1個M x 16位）的CMOS 3.0伏，不僅具備高性能頁面模式閃存 |
| 文件頁數(shù)： | 17/44頁 |
| 文件大?。?/td> | 987K |
| 代理商： | AM29PL160CB-65R |
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16
Am29PL160C
June 12, 2002
COMMAND DEFINITIONS
Writing specific address and data commands or se-
quences into the command register initiates device
operations. Table 10 defines the valid register com-
mand sequences. Writing
incorrect
address and
data values
or writing them in the
improper se-
quence
resets the device to reading array data.
All addresses are latched on the falling edge of WE# or
CE#, whichever happens later. All data is latched on
the rising edge of WE# or CE#, whichever happens
first. Refer to the appropriate timing diagrams in the
“AC Characteristics” section.
Reading Array Data
The device is automatically set to reading array data
after device power-up. No commands are required to
retrieve data. The device is also ready to read array
data after completing an Embedded Program or Em-
bedded Erase algorithm.
After the device accepts an Erase Suspend command,
the device enters the Erase Suspend mode. The sys-
tem can read array data using the standard read
timings, except that if it reads at an address within
erase-suspended sectors, the device outputs status
data. After completing a programming operation in the
Erase Suspend mode, the system may once again
read array data with the same exception. See “Erase
Suspend/Erase Resume Commands” for more infor-
mation on this mode.
The system
must
issue the reset command to re-en-
able the device for reading array data if DQ5 goes
high, or while in the autoselect mode. See the “Reset
Command” section, next.
See also “Requirements for Reading Array Data” in the
“Device Bus Operations” section for more information.
The Read Operations table provides the read parame-
ters, and Figure 11 shows the timing diagram.
Reset Command
Writing the reset command to the device resets the de-
vice to reading array data. Address bits are don’t care
for this command.
The reset command may be written between the se-
quence cycles in an erase command sequence before
erasing begins. This resets the device to reading array
data. Once erasure begins, however, the device ig-
nores reset commands until the operation is complete.
The reset command may be written between the se-
quence cycles in a program command sequence
before programming begins. This resets the device to
reading array data (also applies to programming in
Erase Suspend mode). Once programming begins,
however, the device ignores reset commands until the
operation is complete.
The reset command may be written between the se-
quence cycles in an autoselect command sequence.
Once in the autoselect mode, the reset command
must
be written to return to reading array data (also applies
to autoselect during Erase Suspend).
If DQ5 goes high during a program or erase operation,
writing the reset command returns the device to read-
ing array data (also applies during Erase Suspend).
Autoselect Command Sequence
The autoselect command sequence allows the host
system to access the manufacturer and devices
codes, and determine whether or not a sector is pro-
tected. Table 10 shows the address and data
requirements. This method is an alternative to that
shown in Table 5, which is intended for PROM pro-
grammers and requires V
ID
on address bit A9.
The autoselect command sequence is initiated by writ-
ing two unlock cycles, followed by the autoselect
command. The device then enters the autoselect mode,
and the system may read at any address any number of
times, without initiating another command sequence.
A read cycle at address XX00h retrieves the
manufacturer code. A read cycle at address XX01h re-
turns the device code. A read cycle containing a sector
address (SA) and the address 02h in word mode (or
04h in byte mode) returns 01h if that sector is pro-
tected, or 00h if it is unprotected. Refer to Table 4 for
valid sector addresses.
The system must write the reset command to exit the
autoselect mode and return to reading array data.
Word/Byte Program Command Sequence
The system may program the device by word or byte,
depending on the state of the BYTE# pin. Program-
ming is a four-bus-cycle operation. The program
command sequence is initiated by writing two unlock
write cycles, followed by the program set-up com-
mand. The program address and data are written next,
which in turn initiate the Embedded Program algo-
rithm. The system is
not
required to provide further
controls or timings. The device automatically gener-
ates the program pulses and verifies the programmed
cell margin. Table 10 shows the address and data re-
quirements for the byte program command sequence.
When the Embedded Program algorithm is complete,
the device then returns to reading array data and ad-
dresses are no longer latched. The system can
determine the status of the program operation by using
DQ7 or DQ6. See “Write Operation Status” for infor-
mation on these status bits.
Any commands written to the device during the Em-
bedded Program Algorithm are ignored.
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