參數(shù)資料
型號： AM29SL800DB90
廠商： Advanced Micro Devices, Inc.
英文描述： 8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
中文描述： 8兆位（1 M中的x 8-Bit/512畝x 16位），1.8伏的CMOS只超低電壓快閃記憶體
文件頁數(shù)： 4/46頁
文件大?。?/td> 1177K
代理商： AM29SL800DB90
A D V A N C E I N F O R M A T I O N
March 17, 2003
Am29SL800D
3
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . .4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . .5
Special Handling Instructions for FBGA Packages ..................6
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . .7
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ordering Information . . . . . . . . . . . . . . . . . . . . . . .8
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . .9
Table 1. Am29SL800D Device Bus Operations ................................9
Word/Byte Configuration ..........................................................9
Requirements for Reading Array Data .....................................9
Writing Commands/Command Sequences ..............................9
Programand Erase Operation Status ....................................10
Standby Mode ........................................................................10
Automatic Sleep Mode ...........................................................10
RESET#: Hardware Reset Pin ...............................................10
Output Disable Mode ..............................................................11
Table 2. Am29SL800DT Top Boot Block Sector Address Table .....11
Table 3. Am29SL800DB BottomBoot Block Sector Address Table 12
Autoselect Mode .....................................................................13
Table 4. Am29SL800D Autoselect Codes (High Voltage Method) ..13
Sector Protection/Unprotection ...............................................13
Temporary Sector Unprotect ..................................................13
Figure 1. In-SystemSector Protect/Unprotect Algorithms.............. 14
Figure 2. Temporary Sector Unprotect Operation........................... 15
Hardware Data Protection ......................................................15
Low V
CC
Write Inhibit ..............................................................15
Write Pulse “Glitch” Protection ...............................................15
Logical Inhibit ..........................................................................15
Power-Up Write Inhibit ............................................................15
Command Definitions . . . . . . . . . . . . . . . . . . . . . 15
Reading Array Data ................................................................15
Reset Command .....................................................................15
Autoselect Command Sequence ............................................16
Word/Byte ProgramCommand Sequence .............................16
Unlock Bypass Command Sequence .....................................16
Figure 3. ProgramOperation.......................................................... 17
Chip Erase Command Sequence ...........................................17
Sector Erase Command Sequence ........................................17
Erase Suspend/Erase Resume Commands ...........................18
Figure 4. Erase Operation............................................................... 18
Table 5. Am29SL800D Command Definitions ................................19
Write Operation Status . . . . . . . . . . . . . . . . . . . . 20
DQ7: Data# Polling .................................................................20
Figure 5. Data#Polling Algorithm................................................... 20
RY/BY#: Ready/Busy#...........................................................21
DQ6: Toggle Bit I ....................................................................21
DQ2: Toggle Bit II ...................................................................21
Reading Toggle Bits DQ6/DQ2 ..............................................21
Figure 6. Toggle Bit Algorithm........................................................ 22
DQ5: Exceeded Timng Limts ................................................22
DQ3: Sector Erase Timer .......................................................22
Table 6. Write Operation Status .....................................................23
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 24
Figure 7. MaximumNegative OvershootWaveformMaximumNega-
tive Overshoot Waveform............................................................... 24
Figure 8. MaximumPositive OvershootWaveform........................ 24
Operating Ranges. . . . . . . . . . . . . . . . . . . . . . . . . 24
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 9. I
CC1
Current vs. Time (Showing Active and Automatic
SleepCurrents).............................................................................. 26
Figure 10. Typical I
CC1
vs. Frequency........................................... 26
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 11. Test Setup..................................................................... 27
Table 7. Test Specifications ...........................................................27
Key to Switching Waveforms ..................................................27
Figure 12. Input Waveforms and Measurement Levels................. 27
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 28
Read Operations ....................................................................28
Figure 13. Read Operations Timngs............................................. 28
Figure 14. RESET#Timngs.......................................................... 29
Word/Byte Configuration (BYTE#) ........................................30
Figure 15. BYTE#Timngs for Read Operations............................ 30
Figure 16. BYTE#Timngs for Write Operations............................ 30
Erase/ProgramOperations .....................................................31
Figure 17. ProgramOperation Timngs.......................................... 32
Figure 18. Chip/Sector Erase Operation Timngs.......................... 33
Figure 19. Data# Polling Timngs (During Embedded Algorithms). 34
Figure 20. Toggle Bit Timngs (During Embedded Algorithms)...... 34
Figure 21. DQ2 vs. DQ6................................................................. 35
Temporary Sector Unprotect ..................................................35
Figure 22. Temporary Sector Unprotect Timng Diagram.............. 35
Figure 23. Sector Protect/Unprotect Timng Diagram.................... 36
Alternate CE#Controlled Erase/ProgramOperations ............37
Figure 24. Alternate CE#Controlled Write Operation Timngs...... 38
Erase and Programming Performance . . . . . . . 39
Latchup Characteristics. . . . . . . . . . . . . . . . . . . . 39
TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . . 39
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 40
TS 048–48-Pin Standard TSOP .............................................40
TSR048–48-Pin Reverse TSOP .............................................41
FBA048–48-Ball Fine-Pitch Ball Grid Array (FBGA)
6 x 8 mmpackage ..................................................................42
FBC048–48-Ball Fine-Pitch Ball Grid Array (FBGA)
8 x 9 mmpackage ..................................................................43
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 44
Revision A (February 4, 2003) ................................................44
Revision A+1 (March 17, 2003) ..............................................44
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