參數資料
型號: AM41LV3204MB10IT
廠商: ADVANCED MICRO DEVICES INC
元件分類: 存儲器
英文描述: Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
中文描述: SPECIALTY MEMORY CIRCUIT, PBGA69
封裝: 8 X 10 MM, 1.20 MM HEIGHT, FBGA-69
文件頁數: 12/67頁
文件大?。?/td> 484K
代理商: AM41LV3204MB10IT
June 10, 2003
Am41LV3204M
11
P R E L I M I N A R Y
Table 2.
Device Bus Operations—Flash Word Mode, CIOf = V
IH
, SRAM Word Mode, CIOs = V
IL
Legend:
L = Logic Low = V
IL
, H = Logic High = V
IH
, V
ID
= 11.5–12.5
V, V
HH
= 9.0 ± 0.5 V, X = Don’t Care, SA = SRAM Address
Input, Byte Mode, SADD = Flash Sector Address, A
IN
= Address In, D
IN
= Data In, D
OUT
= Data Out, DNU = Do Not Use
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = V
IL
, CE1#s = V
IL
and CE2s = V
IH
at the same time.
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
IL
, the boot sectors will be protected. If WP#/ACC = V
IH
the boot sectors protection will be removed.
If WP#/ACC = V
ACC
(9V), the program time will be reduced by 40%.
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “” section.
6. If WP#/ACC = V
IL
, the two outermost boot sectors remain protected. If WP#/ACC = V
IH
, the two outermost boot sector protection
depends on whether they were last protected or unprotected using the method described in “”. If WP#/ACC = V
HH,
all sectors will
be unprotected.
Operation
(Notes 1, 2)
CE#f CE1#s CE2s OE# WE# SA
Addr.
LB#s
(Note 3)
UB#s
(Note 3)RESET#WP#/ACC
(Note 4)
DQ7–
DQ0
DQ15–
DQ8
Read from Flash
L
H
X
L
H
X
A
IN
X
X
H
L/H
D
OUT
D
OUT
X
L
Write to Flash
L
H
X
H
L
X
A
IN
X
X
H
(Note 3)
D
IN
D
IN
X
L
Standby
V
CC
±
0.3 V
H
X
X
X
X
X
X
X
V
CC
±
0.3 V
H
High-Z High-Z
X
L
Output Disable
L
L
H
H
H
SA
X
DNU
DNU
H
L/H
High-Z High-Z
Flash Hardware
Reset
X
H
X
X
X
X
X
X
X
L
L/H
High-Z High-Z
X
L
Sector Protect
(Note 5)
L
H
X
H
L
X
SADD,
A6 = L,
A1 = H,
A0 = L
X
X
V
ID
L/H
D
IN
X
X
L
Sector Unprotect
(Note 5)
L
H
X
H
L
X
SADD,
A6 = H,
A1 = H,
A0 = L
X
X
V
ID
(Note 6)
D
IN
X
X
L
Temporary Sector
Unprotect
X
H
X
X
X
X
A
IN
X
X
V
ID
(Note 6)
D
IN
High-Z
X
L
Read from SRAM
H
L
H
L
H
SA
A
IN
A
IN
X
X
H
X
D
OUT
D
IN
High-Z
Write to SRAM
H
L
H
X
L
SA
X
X
H
X
High-Z
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