參數(shù)資料
型號(hào)： AM41LV3204MB10IT
廠商： ADVANCED MICRO DEVICES INC
元件分類： 存儲(chǔ)器
英文描述： Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA69
封裝： 8 X 10 MM, 1.20 MM HEIGHT, FBGA-69
文件頁數(shù)： 58/67頁
文件大小： 484K
代理商： AM41LV3204MB10IT
June 10, 2003
Am41LV3204M
57
P R E L I M I N A R Y
AC CHARACTERISTICS
SRAM Write Cycle
Notes:
1. WE# controlled.
2. t
CW
is measured from CE1#s going low to the end of write.
3. t
WR
is measured from the end of write to the address change. t
WR
applied in case a write ends as CE1#s or WE# going high.
4. t
AS
is measured from the address valid to the beginning of write.
5. A write occurs during the overlap (t
WP
) of low CE#1 and low WE#. A write begins when CE1#s goes low and WE# goes low when
asserting UB#s or LB#s for a single byte operation or simultaneously asserting UB#s and LB#s for a double byte operation. A
write ends at the earliest transition when CE1#s goes high and WE# goes high. The t
WP
is measured from the beginning of write
to the end of write.
Figure 28.
SRAM Write Cycle—WE# Control
Parameter
Symbol
Description
Speed Option
Unit
10
t
WC
Write Cycle Time
Min
70
ns
t
Cw
Chip Enable to End of Write
Min
60
ns
t
AS
Address Setup Time
Min
0
ns
t
AW
Address Valid to End of Write
Min
60
ns
t
BW
UB#s, LB#s to End of Write
Min
60
ns
t
WP
Write Pulse Time
Min
50
ns
t
WR
Write Recovery Time
Min
0
ns
t
WHZ
Write to Output High-Z
Min
0
ns
Max
20
t
DW
Data to Write Time Overlap
Min
30
ns
t
DH
Data Hold from Write Time
Min
0
ns
t
OW
End Write to Output Low-Z
Min
5
ns
Address
CE1#s
Data Undefined
WE#
Data In
Data Out
t
WC
t
CW
(See Note 1)
t
AW
High-Z
High-Z
Data Valid
CE2s
t
CW
(See Note 1)
t
WP
(See Note 4)
t
AS
(See Note 3)
t
WR
t
DW
t
DH
t
OW
t
WHZ
相關(guān)PDF資料
PDF描述
AM41LV3204MT10IT Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
AM41PDS3224DT110IT 32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
AM41PDS3224DB100IS 32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
AM41PDS3224DB100IT 32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
AM41PDS3224DB10IS 32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM41LV3204MT10I 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
AM41LV3204MT10IS 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
AM41LV3204MT10IT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
AM41LV320MB10IS 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
AM41LV320MB10IT 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
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