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參數(shù)資料
| 型號(hào)： | AM79C901AJCT |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 網(wǎng)絡(luò)接口 |
| 英文描述： | HomePHY Single-Chip 1/10 Mbps Home Networking PHY |
| 中文描述： | DATACOM, ETHERNET TRANSCEIVER, PQCC68 |
| 封裝： | PLASTIC, MO-047BAE, LCC-68 |
| 文件頁數(shù)： | 51/90頁 |
| 文件大?。?/td> | 714K |
| 代理商： | AM79C901AJCT |
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Am79C901A
51
P R E L I M I N A R Y
HPR17: HomePNA PHY Status/Control Register (Register 17)
The HomePNA PHY Status/Control Register pro-
vides information regarding the global aspects of the
operation of the PHY.
Table 27.
HPR17: HomePNA PHY Status/Control Register (Register 17)
HPR18 and HPR19: HomePNA PHY TxCOMM
Registers (Registers 18 and 19)
Table 28.
HPR18 and HPR19: HomePNA PHY TxCOMM Registers (Registers 18 and 19)
The 32-bit transmitted data field is to be used for out-
of-band communication between PHY management
entities. No protocol for out-of-band management has
been defined. Accessing the low word causes the PHY
to send all-0 PCOMs until the high word has been ac-
cessed. Once accessed, the next transmitted packet
will cause this register
’
s contents to be shifted out in the
PCOM field of the transmitted packet. Upon transmis-
sion, this register will read back as all 0s. A non-null
transmitted PCOM will set the TxPCOM Ready bit in
the Event Status Register (HPR26). An access to any
of the two TxPCOM words will clear the TxPCOM
Ready bit in the ISTAT register.
Bits
Name
Description
Read/Write
Default
Value
(hex)
15:13
Reserved
Test control bits. Reads will produce undefined
results. Should be written as 0.
R
00
12
any1Home_ Disable
1 = any1Home Link packet disabled
0 = any1Home Link packet enabled
R/W
0
11:8
Reserved
Test control bits. Reads will produce undefined
results. Should be written as 0.
R
3
7
Reserved
Test control bit. Reads will produce undefined
results. Should be written as 0.
R
0
6
Received_Power
1 = Last packet received, was sent at High Power
0 = Last packet received, was sent at Low Power
R
0
5
Received_Speed
1 = Last packet received, was sent at High Speed
0 = Last packet received, was sent at Low Speed
R
0
4
Received_Ver
1 = Last packet received, was sent at Version XX
0 = Last packet received, was sent at Version 0
R
0
3:0
Reserved
Test control bits. Reads will produce undefined
results. Should be written as 0.
R
X
Bits
Name
Description
Read/Write
Default
Value
(hex)
15:0
PHY_TX_COMM (4)
The 32-bit preamble transmitted on the HomePNA
PHY. HPR18 contains the high word and HPR19 the
low word.
R/W
0000
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM79C901AJI | HomePHY Single-Chip 1/10 Mbps Home Networking PHY |
| AM79C901AJIT | HomePHY Single-Chip 1/10 Mbps Home Networking PHY |
| AM79C901AVC | HomePHY Single-Chip 1/10 Mbps Home Networking PHY |
| AM79C901AVCT | HomePHY Single-Chip 1/10 Mbps Home Networking PHY |
| AM79C901AVI | HomePHY Single-Chip 1/10 Mbps Home Networking PHY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C901AJI | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:HomePHY Single-Chip 1/10 Mbps Home Networking PHY |
| AM79C901AJIT | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:HomePHY Single-Chip 1/10 Mbps Home Networking PHY |
| AM79C901AVC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:HomePHY Single-Chip 1/10 Mbps Home Networking PHY |
| AM79C901AVC/w | 制造商:Advanced Micro Devices 功能描述:79C901AVC/W |
| AM79C901AVC\\W | 制造商:Advanced Micro Devices 功能描述: |
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