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參數(shù)資料
| 型號(hào)： | AMP04FSZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 3/16頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP INST PREC 30MA LP 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 放大器類型： | 儀表 |
| 電路數(shù)： | 1 |
| -3db帶寬： | 700kHz |
| 電流 - 輸入偏壓： | 22nA |
| 電壓 - 輸入偏移： | 30µV |
| 電流 - 電源： | 750µA |
| 電流 - 輸出 / 通道： | 30mA |
| 電壓 - 電源，單路/雙路(±)： | 5 V ~ 30 V，±2.5 V ~ 15 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
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AMP04
REV. B
–11–
4-20 mA Loop Receiver
At the receiving end of a 4-20 mA loop, the AMP04 makes a
convenient differential receiver to convert the current back to
a usable voltage (Figure 13). The 4-20 mA signal current passes
through a 100
sense resistor. The voltage drop is differentially
amplified by the AMP04. The 4 mA offset is removed by the
offset correction circuit.
AMP04
1k
3
2
4
6
VOUT
7
+15V
–15V
100
1%
1N4002
WIRE
RESISTANCE
1k
4–20mA
TRANSMITTER
100k
POWER
SUPPLY
0.15 F
4–20mA
0–1.6V FS
5
8
1
OP177
2
3
AD589
–15V
6
27k
10k
–0.400V
Figure 13. 4-to-20 mA Line Receiver
Low Power, Pulsed Load-Cell Amplifier
Figure 14 shows a 350
load cell that is pulsed with a low duty
cycle to conserve power. The OP295’s rail-to-rail output capa-
bility allows a maximum voltage of 10 volts to be applied to the
bridge. The bridge voltage is selectively pulsed on when a mea-
surement is made. A negative-going pulse lasting 200 ms should
be applied to the MEASURE input. The long pulsewidth is
necessary to allow ample settling time for the long time constant
of the low-pass filter around the AMP04. A much faster settling
time can be achieved by omitting the filter capacitor.
AMP04
3
2
VOUT
7
6
IN
GND
OUT
REF01
1/2
OP295
MEASURE
1N4148
10k
1k
50k
12V
5
4
330
0.22 F
8
1
2N3904
12V
350
Figure 14. Pulsed Load Cell Bridge Amplifier
Single Supply Programmable Gain Instrumentation Amplifier
Combining with the single supply ADG221 quad analog switch,
the AMP04 makes a useful programmable gain amplifier that
can handle input and output signals at zero volts. Figure 15
shows the implementation. A logic low input to any of the gain
control ports will cause the gain to change by shorting a gain-
set resistor across AMP04’s Pins 1 and 8. Trimming is required
at higher gains to improve accuracy because the switch ON-
resistance becomes a more significant part of the gain-set
resistance. The gain of 500 setting has two switches connected
in parallel to reduce the switch resistance.
8
7
6
5
1
2
3
4
V–
REF
V+
RG
AMP04
ADG221
13
10
9
7
8
15
16
2
1
12
5V TO
30V
VOUT
0.22 F
5
4
11
6
14
3
715
10.9k
200
0.1 F
10 F
5V TO 30V
GAIN OF 500
GAIN OF 100
GAIN OF 10
WR
GAIN
CONTROL
0.1 F
INPUT
100k
Figure 15. Single Supply Programmable Gain Instrumen-
tation Amplifier
The switch ON resistance is lower if the supply voltage is 12 volts
or higher. Additionally, the overall amplifier’s temperature coeffi-
cient also improves with higher supply voltage.
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