- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄295067 > AP2007 Synchronous PWM Controller PDF資料下載
參數(shù)資料
| 型號(hào)： | AP2007 |
| 英文描述： | Synchronous PWM Controller |
| 中文描述： | 同步PWM控制器 |
| 文件頁(yè)數(shù)： | 5/7頁(yè) |
| 文件大?。?/td> | 181K |
| 代理商： | AP2007 |
AP2007
Synchronous PWM with VFC Controller
(Preliminary)
Anachip Corp
www.anachip.com.tw
Rev. 1.0 Apr 1, 2005
5/7
Virtual Frequency Control (Continued)
Virtual frequency control is a technique that
provides stable, constant frequency of operation for
pulse controlled architectures such as constant
off-time/on-time. This is all done internal to the IC
with minimal number of components and without the
need for connections to external terminals such as
input and/or output. No external compensation is
required,
thus
providing
a
low
cost,
high
performance fix frequency solution for switching
voltage regulators.
Virtual Frequency Control is a trademark of
PWRTEK, LLC.
Function Description
Synchronous Buck Converter
Primary VCORE power is provided by a synchronous,
voltage-mode pulse width modulated (PWM)
controller. This section has all the features required
to build a high efficiency synchronous buck
converter, including soft-start, shutdown, and
cycle-by-cycle current limit.
Referring to the functional block diagram FIG 1, the
output voltage of the synchronous converter is set
and controlled by the output of the error comparator.
The external resistive divider reference voltage, is
derived from an internal trimmed-bandgap voltage
reference. The inverting input of the error
comparator receives its voltage from the FB pin.
The internal oscillator uses an on-chip capacitor and
trimmed precision current sources to set the virtual
oscillation frequency to 200KHz. The virtual
frequency oscillator sets the PWM latch. This pulls
DRVN low, turning off the low-side N_MOSFET and
DRVP is pulled low, turning on the high-side
P-MOSFET (once the cross-current control allows
it). The triangular voltage ramp at the FB pin is then
compared against the reference voltage at the
inverting input of the error comparator. When the FB
voltage increases above the reference voltage, the
comparator output goes high. This pulls DRVP high,
turning off the high-side P-MOSFET, and DRVN is
pulled high, turning on the low-side N-MOSFET
(once the cross-current control allows it). The Virtual
Frequency Oscillator then generates a programmed
off time to allow the FB voltage to return to the valley
voltage of the triangular ramp. At the end of the off
time the PWM latch is set and the cycle repeats
again.
Under Voltage Lockout
The under voltage lockout circuit of the AP2007
assures that the high-side P-MOSFET driver
outputs remain in the off state whenever the supply
voltage drops below set parameters. Lockout occurs
if VCC falls below 3.8V. Normal operation resumes
once VCC rises above 4.0V.
RDS(ON) Current Limiting
The current limit threshold (0.4V) is set by
connecting an internal resistor from the VCC supply
to OCSET. Vocset is compared to the voltage at the
PHASE node. This comparison is made only when
the high-side drive is high to avoid false current limit
triggering due to uncontributing measurements from
the MOSFETs off-voltage. When the voltage at
PHASE is less than the voltage at OCSET, an
over-current condition occurs and the soft start cycle
is initiated. The synchronous switch
turns on and SS/ SHDN starts to sink 2uA. When
SS/ SHDN reaches 0.2V, it then starts to source
10uA and a new cycle begins. When the soft start
voltage is below 0.9V the cycle is controlled with
pulse by pulse current limiting.
Soft Start
Initially, SS/ SHDN pin sources 10uA of current to
charge an external capacitor. The inverting input of
the error comparator is clamped to a voltage
proportional to the voltage on SS/ SHDN . This limits
the on-time of the high-side P-MOSFET, thus
leading to a controlled ramp-up of the output
voltages.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AP2007S | Synchronous PWM Controller |
| AP2007SA | Surface Mount Resistors Thick Film Chip Resistors |
| AP2014SG-13 | |
| AP2112K-2.5TRG1 | 2.5 V FIXED POSITIVE LDO REGULATOR, 0.4 V DROPOUT, PDSO5 |
| AP2112R5-1.8TRG1 | 1.8 V FIXED POSITIVE LDO REGULATOR, 0.7 V DROPOUT, PDSO5 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AP2007S | 制造商:ANACHIP 制造商全稱:Anachip Corp 功能描述:Synchronous PWM Controller |
| AP2007SA | 制造商:ANACHIP 制造商全稱:Anachip Corp 功能描述:Synchronous PWM Controller |
| AP2007SL-13 | 功能描述:開(kāi)關(guān)變換器、穩(wěn)壓器與控制器 SW REG CNTL BUCK BI 200K 9.5MA 20V 1.25V RoHS:否 制造商:Texas Instruments 輸出電壓:1.2 V to 10 V 輸出電流:300 mA 輸出功率: 輸入電壓:3 V to 17 V 開(kāi)關(guān)頻率:1 MHz 工作溫度范圍: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WSON-8 封裝:Reel |
| AP2007SL-U | 功能描述:開(kāi)關(guān)變換器、穩(wěn)壓器與控制器 SW REG CNTL BUCK BI 200K 9.5MA 20V 1.25V RoHS:否 制造商:Texas Instruments 輸出電壓:1.2 V to 10 V 輸出電流:300 mA 輸出功率: 輸入電壓:3 V to 17 V 開(kāi)關(guān)頻率:1 MHz 工作溫度范圍: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WSON-8 封裝:Reel |
| AP2008 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PWM Buck Controller |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。