參數(shù)資料
型號: AS4LC1M16E5-60TC
廠商: Electronic Theatre Controls, Inc.
英文描述: 3V 1M X 6 CMOS DRAM (EDO)
中文描述: 3V的100萬× 6的CMOS的DRAM(江戶)
文件頁數(shù): 7/22頁
文件大?。?/td> 604K
代理商: AS4LC1M16E5-60TC
AS4LC1M16E5
4/11/01
Alliance Semiconductor
7
Hyper page mode cycle
Shaded areas indicate advance information.
Output enable
Shaded areas indicate advance information.
Self refresh cycle
Shaded areas indicate advance information.
Symbol
Parameter
-50
-60
Unit
Notes
Min
Max
Min
Max
t
CPWD
t
CPA
t
RASP
t
DOH
t
REZ
t
WEZ
t
OEZ
t
HPC
t
HPRWC
t
RHCP
CAS precharge to WE delay time
45
52
ns
Access time from CAS precharge
28
35
ns
16
RAS pulse width
50
100K
60
100K
ns
Previous data hold time from CAS
5
5
ns
Output buffer turn off delay from RAS
0
13
0
15
ns
Output buffer turn off delay from WE
0
13
0
15
ns
Output buffer turn off delay from OE
0
13
0
15
ns
Hyper page mode cycle time
20
25
ns
Hyper page mode RMW cycle
47
56
ns
RAS hold time from CAS
30
35
ns
Symbol
Parameter
-50
-60
Unit
Notes
Min
Max
Min
Max
t
CLZ
t
ROH
t
OEA
t
OED
t
OEZ
t
OEH
t
OLZ
t
OFF
CAS to output in Low Z
0
0
ns
11
RAS hold time referenced to OE
8
10
ns
OE access time
13
15
ns
OE to data delay
13
15
ns
Output buffer turnoff delay from OE
0
13
0
15
ns
11
OE command hold time
10
10
ns
OE to output in Low Z
0
0
ns
Output buffer turn-off time
0
13
0
15
ns
11,13
Std Symbol
Parameter
-50
-60
Unit
Notes
Min
Max
Min
Max
t
RASS
RAS pulse width
(CBR self refresh)
100
100
μs
t
RPS
RAS precharge time
(CBR self refresh)
90
105
ns
t
CHS
CAS
hold time
(CBR self refresh)
8
10
ns
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