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參數(shù)資料
| 型號(hào)： | AS7C25512PFD36A-133TQIN |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類(lèi)： | SRAM |
| 英文描述： | 512K X 36 STANDARD SRAM, 3.8 ns, PQFP100 |
| 封裝： | 14 X 20 MM, LEAD FREE, TQFP-100 |
| 文件頁(yè)數(shù)： | 4/19頁(yè) |
| 文件大小： | 523K |
| 代理商： | AS7C25512PFD36A-133TQIN |
第1頁(yè)第2頁(yè)第3頁(yè)當(dāng)前第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)
AS7C25512PFD32A
AS7C25512PFD36A
2/10/05, v. 1.2
Alliance Semiconductor
12 of 19
Timing waveform of write cycle
Note: = XOR when LBO = high/no connect; = ADD when LBO = low.
tCYC
tCL
tADSPS
tADSPH
tADSCS
tADSCH
tAS
tAH
tWS
tWH
tCSS
tADVS
tDS
tDH
CLK
ADSP
ADSC
Address
BWE
CE0, CE2
ADV
OE
Din
tCSH
tADVH
D(A201)
D(A210)
D(A3)
D(A2)
D(A201)
D(A301)
D(A310)
D(A1)
D(A211)
ADV SUSPENDS BURST
ADSC LOADS NEW ADDRESS
A1
A2
A3
tCH
CE1
BW[a:d]
Read
Q(A1)
Sus-
pend
Write
D(A1)
Read
Q(A2)
Suspend
Write
D(A 2)
ADV
Burst
Write
D(A 201)
Suspend
Write
D(A 201)
ADV
Burst
Write
D(A 210)
Write
D(A 3)
Burst
Write
D(A 301)
ADV
Burst
Write
D(A 211)
ADV
Burst
Write
D(A 310)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS7C25512PFD36A-166TQC | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:2.5V 512K x 32/36 pipelined burst synchronous SRAM |
| AS7C25512PFD36A-166TQCN | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:2.5V 512K x 32/36 pipelined burst synchronous SRAM |
| AS7C25512PFD36A-166TQI | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:2.5V 512K x 32/36 pipelined burst synchronous SRAM |
| AS7C25512PFD36A-166TQIN | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:2.5V 512K x 32/36 pipelined burst synchronous SRAM |
| AS7C25512PFS32A | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:2.5V 512K x 32/36 pipelined burst synchronous SRAM |
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