參數(shù)資料
型號(hào): AS8501-ASOT
廠商: ams
文件頁(yè)數(shù): 41/41頁(yè)
文件大?。?/td> 0K
描述: IC CURRENT MEASURE SOLAR 16-SOIC
標(biāo)準(zhǔn)包裝: 1,500
類型: 數(shù)據(jù)采集系統(tǒng)(DAS)
輸入類型: 模擬,數(shù)字
輸出類型: 模擬,數(shù)字
接口: 串行
電流 - 電源: 5mA
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 帶卷 (TR)
AS8501 - Data Sheet
austriamicrosystems
Revision 1.1, 04-April-06
www.austriamicrosystems.com
Page 8 of 40
Electrical characteristics (continued)
VDDA=5V +/-0.1 V, fclk=8.192 MHz, chopping ratio MM=4 (see 7.5.3), oversampling frequency=2.048 MHz, oversampling ratio=128
temperature range : -40 to 125°C if not otherwise noted
symbol
parameter
conditions
min
typ
max
units
programmable current source
output to Vbat, ETS, or ETR
Icurr_ON
current level
0
248
A
I_steps
current steps
6
8
10
A
Dcurr
accuracy, room temperature
248 A
0.2
0.5
%
TC_CS
temperature coefficient
830
900
1000
ppm/K
1 )
Icurr_OFF
current when off
room temperature
0.001
0.01
A
Icurr_Ri
internal resistance of current source Ua < 2 V
10
MOhm
digital CMOS inputs with pull up and schmidt-trigger
input PINs CLK and SCLK
Vih
high level input voltage
VDDD=5V
3.5
V
Vil
low level input voltage
VDDD=5V
1.5
V
Iih
current level
VDDD=5V, Vih=5V
-1
1
A
Iil
current level
VDDD=5V, Vil=0
30
120
A
digital CMOS outputs
output PINs SDAT and INTN
Voh
high level output voltage
VDDD=5V, -633uA
4.5
V
Vol
low level output voltage
VDDD=5V, 564uA
0.4
V
Cl
capacitive load
20
pF
Tristate digital I/O
Voh
high level output voltage
VDDD=5V, -633uA
4.5
V
Vol
low level output voltage
VDDD=5V, 564uA
0.4
V
Ioz
tristate leakage current to
VDDD,VSSD
VDDD=5V
-1
1
A
Vih
high level input voltage
VDDD=5V
3.5
V
Vil
low level input voltage
VDDD=5V
1.5
V
EZPRG input
Vprg
programming voltage - for factory
programming only
VDDD=5V
-
V
2)
supply current
Isup
normal operation
VDDD=VDDA=5V
3
5
mA
Iaw
active wake-up
VDDD=VDDA=5V
40
100
A
3)
supply voltage
VDDA
positive analog supply voltage
4.7
5.0
5.3
V
4)
VDDD
positive digital supply voltage
4.5
5.0
5.5
V
VSS, VSSD
negative supply voltage
0
V
Power On Reset
Vporhi
Power on reset Hi
2.5
4.1
V
5)
Vhyst
Hysteresis
0.1
0.3
V
5)
Notes:
1)
not tested, derived from device characterization
2)
for factory calibration only. During normal operation this PIN must be connected to VDDD.
3)
the average current is dependent on the on-time of the measurement system i.e. it can be programed via the CRA register
4)
stability of analog supply should be within +/- 0.1 V
5)
tested at room temperature only
ams
AG
Technical
content
still
valid
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