參數(shù)資料
型號: AT17LV512A-10PI
廠商: Atmel
文件頁數(shù): 2/18頁
文件大小: 0K
描述: IC CONFIG SEEPROM 512K 8DIP
標準包裝: 50
可編程類型: 串行 EEPROM
存儲容量: 512kb
電源電壓: 3 V ~ 3.6 V,4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-DIP(0.300",7.62mm)
供應商設(shè)備封裝: 8-DIP
包裝: 管件
產(chǎn)品目錄頁面: 609 (CN2011-ZH PDF)
配用: ATDH2225-ND - CABLE ISP FOR AT17
ATDH2200E-ND - CONFIGURATOR PROGRAM BOARD KIT
10
2322G–CNFG–03/06
AT17LV65A/128A/256A/512A/002A
Notes:
1. AC test lead = 50 pF.
2. Float delays are measured with 5 pF AC loads. Transition is measured ± 200 mV from steady-state active levels.
Notes:
1. AC test lead = 50 pF.
2. Float delays are measured with 5 pF AC loads. Transition is measured ± 200 mV from steady-state active levels.
17. AC Characteristics
V
CC = 3.3V ± 10%
Symbol
Description
AT17LV65A/128A/256A
AT17LV512A/010A/002A
Units
Commercial
Industrial
Commercial
Industrial
Min
Max
Min
Max
Min
Max
Min
Max
T
OE to Data Delay
50
55
50
55
ns
T
CE
CE to Data Delay
60605560
ns
T
CAC
CLK to Data Delay
75
80
55
60
ns
T
OH
Data Hold from CE, OE, or CLK
0000
ns
T
DF
CE or OE to Data Float Delay
55
50
ns
T
LC
CLK Low Time
25
ns
T
HC
CLK High Time
25
ns
T
SCE
CE Setup Time to CLK
(to guarantee proper counting)
35
60
30
35
ns
T
HCE
CE Hold Time from CLK
(to guarantee proper counting)
0000
ns
T
HOE
OE High Time (guarantees counter is reset)
25
ns
F
MAX
Maximum Input Clock Frequency
10
15
10
MHz
18. AC Characteristics when Cascading
V
CC = 3.3V ± 10%
Symbol
Description
AT17LV65A/128A/256A
AT17LV512A/010A/002A
Units
Commercial
Industrial
Commercial
Industrial
Min
Max
Min
Max
Min
Max
Min
Max
T
CDF
CLK to Data Float Delay
60
50
ns
T
OCK
CLK to CEO Delay
55
60
50
55
ns
T
OCE
CE to CEO Delay
55
60
35
40
ns
T
OOE
RESET/OE to CEO Delay
40
45
35
ns
F
MAX
Maximum Input Clock Frequency
8
12.5
10
MHz
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