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參數(shù)資料
| 型號： | AT25256B-SSHL-T |
| 廠商： | ATMEL CORP |
| 元件分類： | PROM |
| 英文描述： | 32K X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 0.150 INCH, GREEN, PLASTIC, MS-012AA, SOIC-8 |
| 文件頁數(shù)： | 22/24頁 |
| 文件大?。?/td> | 1025K |
| 代理商： | AT25256B-SSHL-T |
7
8698B–SEEPR–3/10
AT25128B/256B
3.
Functional Description
The AT25128B/256B is designed to interface directly with the synchronous serial peripheral interface (SPI) of the
6800 type series of microcontrollers.
The AT25128B/256B utilizes an 8-bit instruction register. The list of instructions and their operation codes are con-
tained in Table 3-1. All instructions, addresses, and data are transferred with the MSB first and start with a high-to-
low CS transition.
Table 3-1.
Instruction Set for the AT25128B/256B
WRITE ENABLE (WREN): The device will power-up in the write disable state when VCC is applied. All program-
ming instructions must therefore be preceded by a Write Enable instruction.
WRITE DISABLE (WRDI): To protect the device against inadvertent writes, the Write Disable instruction disables
all programming modes. The WRDI instruction is independent of the status of the WP pin.
READ STATUS REGISTER (RDSR): The Read Status Register instruction provides access to the status register.
The Ready/Busy and Write Enable status of the device can be determined by the RDSR instruction. Similarly, the
Block Write Protection bits indicate the extent of protection employed. These bits are set by using the WRSR
instruction.
Table 3-2.
Status Register Format
Table 3-3.
Read Status Register Bit Definition
Instruction Name
Instruction Format
Operation
WREN
0000 X110
Set Write Enable Latch
WRDI
0000 X100
Reset Write Enable Register
RDSR
0000 X101
Read Status Register
WRSR
0000 X001
Write Status Register
READ
0000 X011
Read Data from Memory Array
WRITE
0000 X 010
Write Data to Memory Array
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
WPEN
X
BP1
BP0
WEN
RDY
Bit
Definition
Bit0(RDY)
Bit 0 = “0” (RDY) indicates the device is ready.
Bit 0 = “1” indicates the write cycle is in progress.
Bit 1 (WEN)
Bit1=0 indicates the device is not write enabled.
Bit 1 = “1” indicates the device is write enabled.
Bit 2 (BP0)
See Table 2-4 on page 9.
Bit 3 (BP1)
See Table 2-4 on page 9.
Bits4–6are 0s when device is not an internal write cycle.
Bit 7 (WPEN)
See Table 3-5 on page 8
Bits0–7are “1”s during an internal write cycle.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT25256B-SSHL-T SL901 | 制造商:Atmel Corporation 功能描述:IC EEPROM 256KBIT 20MHZ 8SOIC |
| AT25256B-SSHL-T | 制造商:Atmel Corporation 功能描述:Serial EEPROM IC |
| AT25256B-XHL-B | 功能描述:電可擦除可編程只讀存儲器 256Kbit; SPI Bus High Spd; Mode 0 & 3 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| AT25256B-XHL-T | 功能描述:電可擦除可編程只讀存儲器 256Kbit; SPI Bus High Spd; Mode 0 & 3 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| AT25256B-XHL-T SL901 | 制造商:Atmel Corporation 功能描述:IC EEPROM 256KBIT 20MHZ 8TSSOP |
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