參數(shù)資料
型號: AT30TS750-XM8-B
廠商: ATMEL CORP
元件分類: 溫度/濕度傳感器
英文描述: DIGITAL TEMP SENSOR-SERIAL, 12BIT(s), 3Cel, SQUARE, SURFACE MOUNT
封裝: 3 X 3 MM, GREEN, PLASTIC, MSOP-8
文件頁數(shù): 20/52頁
文件大?。?/td> 1369K
代理商: AT30TS750-XM8-B
Atmel AT30TS750 [Preliminary]
registers are locked, only the RLCK bit of the Nonvolatile Configuration Register can be altered
and reset back to a logic “0”. Any attempts at changing other bits in the Nonvolatile Configuration
Register will be ignored. The RLCK bit is set from the factory to default to the logic “0” state. See
the Register Locking section on page 33 for more details.
Figure 6-6.
Write to Nonvolatile Configuration Register
SCL
SDA
ACK
FROM
SLAVE
START
BY
MASTER
2
1
MSB
3
16
7
5
49
8
ADDRESS BYTE
POINTER REGISTER BYTE
STOP
BY
MASTER
23
16
7
5
49
8
0
1
A
0
0001000
1
0
ACK
FROM
SLAVE
MSB
0
NONVOLATILE CONFIGURATION REGISTER
UPPER BYTE
23
16
7
5
49
8
ACK
FROM
SLAVE
MSB
0
D15 D14 D13 D12 D11 D10
D9
D8
NONVOLATILE CONFIGURATION REGISTER
LOWER BYTE
23
16
7
5
49
8
ACK
FROM
SLAVE
MSB
0
D7
D6
D5
D4
D3
D2
D1
D0
Figure 6-7.
Read from Nonvolatile Configuration Register
SCL
SDA
ACK
FROM
SLAVE
START
BY
MASTER
2
1
MSB
3
16
7
5
49
8
ADDRESS BYTE
STOP
BY
MASTER
23
16
7
5
49
8
0
1
A
1
0
D7
D6
D5
D4
D3
D2
D1
D0
MSB
NACK
FROM
MASTER
1
23
16
7
5
49
8
D15 D14 D13 D12 D11 D10
D9
D8
MSB
ACK
FROM
MASTER
0
NONVOLATILE CONFIGURATION REGISTER
UPPER BYTE
NONVOLATILE CONFIGURATION REGISTER
LOWER BYTE
Note:
Assumes the Pointer Register was previously set to point to the Nonvolatile Configuration Register
6.5
TLOW and THIGH Limit Registers
The 16-bit TLOW and THIGH Limit Registers store the user-programmable lower and upper
temperature limits for the temperature alarm. Like the Temperature Register, the temperature
data values of the TLOW and THIGH Limit Registers are stored in the 2’s complement format with
the MSB (bit 15) of the registers containing the sign bit (“0” indicates a positive number and a “1”
indicates a negative number).
As with the Temperature Register, the resolution selected by the R1 and R0 bits of the
Configuration Register will determine how many bits of the TLOW and THIGH Limit Registers will
be used. Therefore, when writing to the TLOW and THIGH Limit Registers, up to 12 bits of data
8749A-DTS-03/11
27
R
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