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參數(shù)資料
| 型號： | AT40K40LV-3EQC |
| 廠商： | ATMEL CORP |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 2304 CLBS, 40000 GATES, PQFP240 |
| 封裝： | PLASTIC, QFP-240 |
| 文件頁數(shù)： | 8/67頁 |
| 文件大?。?/td> | 1589K |
| 代理商： | AT40K40LV-3EQC |
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16
AT40K/AT40KLV Series FPGA
0896C–FPGA–04/02
Set/Reset Scheme
The AT40K/AT40KLV family reset scheme is essentially the same as the clock scheme
except that there is only one Global Reset. A dedicated Global Set/Reset bus can be
driven by any User I/O, except those used for clocking (Global Clocks or Fast Clocks).
The automatic placement tool will choose the reset net with the most connections to use
the global resources. You can change this by using an RSBUF component in your
design to indicate the global reset. Additional resets will use the express bus network.
The Global Set/Reset is distributed to each column of the array. Like Sector Clock mux,
there is Sector Set/Reset mux at every four cells. Each sector column of four cells is
set/reset by a Plane 5 express bus or Global Set/Reset using the Sector Set/Reset mux,
see Figure 11 on page 17. The set/reset provided to each sector column of four cells is
either inverted or non-inverted using the Sector Reset mux.
The function of the Set/Reset input of a register is determined by a configuration bit in
each cell. The Set/Reset input of a register is active low (logic 0) by default. Setting or
Resetting of a register is asynchronous. Before configuration on power-up, a logic 1 (a
high) is provided by each register (i.e., all registers are set at power-up).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT40K40LV-3EQI | 功能描述:IC FPGA 3.3V 2304 CELL 240PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:AT40K/KLV 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55） |
| AT40K40LV-3FQC | 制造商:Atmel Corporation 功能描述:FPGA 50K GATES 2304 CELLS COMM 0.6UM 3.3V 304PQFP - Trays |
| AT40K40LV-3FQI | 功能描述:IC FPGA 3.3V 2304 CELL 304PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:AT40K/KLV 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55） |
| AT40KAL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:AT40KAL Preliminary [Updated 6/03. 38 Pages] |
| AT40KAL040KW1M | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Military Reprogrammable FPGAs with FreeRAM |
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