參數(shù)資料
型號： AT87251G2D-3CSUM
廠商： Atmel
文件頁數(shù)： 36/77頁
文件大?。?/td> 0K
描述： IC 8051 MCU 32K OTP 24MHZ 40DIP
標(biāo)準(zhǔn)包裝： 216
系列： 8x251
核心處理器： C251
芯體尺寸： 8/16-位
速度： 24MHz
連通性： EBI/EMI，I²C，Microwire，SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 32KB（32K x 8）
程序存儲器類型： OTP
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 40-DIP（0.600"，15.24mm）
包裝： 管件
41
AT/TSC8x251G2D
4135F–8051–11/06
Lock Bit System
The TSC87251G2D products implement 3 levels of security for User’s program as
described in Table 33. The TSC83251G2D products implement only the first level of
security.
Level 0 is the level of an erased part and does not enable any security features.
Level 1 locks the programming of the User’s internal Code Memory, the Configuration
Bytes and the Encryption Array.
Level 2 locks the verifying of the User’s internal Code Memory. It is always possible to
verify the Configuration Bytes and the Lock Bits. It is not possible to verify the Encryp-
tion Array.
Level 3 locks the external execution.
Table 33.
Lock Bits Programming
Notes: 1. Returns encrypted data if Encryption Array is programmed.
2. Returns non encrypted data.
3. x means don’t care. Level 2 always enables level 1, and level 3 always enables levels
1 and 2.
The security level may be verified according to Table 34.
Table 34.
Lock Bits Verifying
Note:
1. x means don’t care.
Encryption Array
The TSC83251G2D and TSC87251G2D products include a 128-byte Encryption Array
located in non-volatile memory outside the memory address space. During verification
of the on-chip code memory, the seven low-order address bits also address the Encryp-
tion Array. As the byte of the code memory is read, it is exclusive-NOR’ed (XNOR) with
the key byte from the Encryption Array. If the Encryption Array is not programmed (still
all 1s), the user program code is placed on the data bus in its original, unencrypted form.
If the Encryption Array is programmed with key bytes, the user program code is
encrypted and cannot be used without knowledge of the key byte sequence.
Level
Lock bits
LB[2:0]
Internal
Execution
External
Execution
Verification
Programming
External
PROM read
(MOVC)
0
000
Enable
Enable(1)
Enable
Enable(2)
1
001
Enable
Enable(1)
Disable
2
01x(3)
Enable
Disable
31xx(3)
Enable
Disable
Level
Lock bits Data
(1)
0
xxxxx000
1
xxxxx001
2
xxxxx01x
3
xxxxx1xx
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