參數(shù)資料
型號: AT87C54X2-SLRUM
廠商: Atmel
文件頁數(shù): 29/62頁
文件大?。?/td> 0K
描述: MCU 8051 16K EPROM 44PLCC
標準包裝: 500
系列: 87C
核心處理器: 8051
芯體尺寸: 8-位
速度: 40/20MHz
連通性: UART/USART
外圍設備: POR,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: OTP
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 帶卷 (TR)
35
4431E–8051–04/06
AT/TS8xC54/8X2
15. Reduced EMI Mode
The ALE signal is used to demultiplex address and data buses on port 0 when used with exter-
nal program or data memory. Nevertheless, during internal code execution, ALE signal is still
generated. In order to reduce EMI, ALE signal can be disabled by setting AO bit.
The AO bit is located in AUXR register at bit location 0. As soon as AO is set, ALE is no longer
output but remains active during MOVX and MOVC instructions and external fetches. During
ALE disabling, ALE pin is weakly pulled high.
Table 15-1.
AUXR Register
AUXR - Auxiliary Register (8Eh)
Reset Value = XXXX XXX0b
Not bit addressable
7
6
5
4
3
2
1
0
-
RESERVED
AO
Bit
Number
Bit
Mnemonic
Description
7-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
2-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
1-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
0AO
ALE Output bit
Clear to restore ALE operation during internal fetches.
Set to disable ALE operation during internal fetches.
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