參數(shù)資料
型號(hào): AT87C54X2-SLRUM
廠商: Atmel
文件頁數(shù): 33/62頁
文件大小: 0K
描述: MCU 8051 16K EPROM 44PLCC
標(biāo)準(zhǔn)包裝: 500
系列: 87C
核心處理器: 8051
芯體尺寸: 8-位
速度: 40/20MHz
連通性: UART/USART
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 32
程序存儲(chǔ)器容量: 16KB(16K x 8)
程序存儲(chǔ)器類型: OTP
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 帶卷 (TR)
39
4431E–8051–04/06
AT/TS8xC54/8X2
Figure 17-1. Set-Up Modes Configuration
17.3.3
Programming Algorithm
The Improved Quick Pulse algorithm is based on the Quick Pulse algorithm and decreases the
number of pulses applied during byte programming from 25 to 1.
To program the TS80C54/58X2 the following sequence must be exercised:
Step 1: Activate the combination of control signals.
Step 2: Input the valid address on the address lines.
Step 3: Input the appropriate data on the data lines.
Step 4: Raise EA/VPP from VCC to VPP (typical 12.75V).
Step 5: Pulse ALE/PROG once.
Step 6: Lower EA/VPP from VPP to VCC
Repeat step 2 through 6 changing the address and data for the entire array or until the end of
the object file is reached (See Figure 17-2.).
17.3.4
Verify algorithm
Code array verify must be done after each byte or block of bytes is programmed. In either case,
a com plete verify of th e p rog ra mm ed array wil l ensure rel iable program m ing of the
TS87C54/58X2.
P 2.7 is used to enable data output.
To verify the TS87C54/58X2 code the following sequence must be exercised:
Step 1: Activate the combination of program and control signals.
Step 2: Input the valid address on the address lines.
Step 3: Read data on the data lines.
Repeat step 2 through 3 changing the address for the entire array verification (See Figure 17-2.)
+5V
VCC
P0.0-P0.7
P1.0-P1.7
P2.0-P2.5,
VSS
GND
D0-D7
A0-A7
A8-A14
RST
EA/VPP
ALE/PROG
PSEN
P2.6
P2.7
P3.3
P3.7
P3.6
XTAL1
4 to 6 MHz
CON T RO L
SIGNALS*
PR O G R AM
SIGNALS*
* See Table 31. for proper value on these inputs
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