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參數(shù)資料
| 型號： | AT88SA102S-TSU-T |
| 廠商： | Atmel |
| 文件頁數(shù)： | 2/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PROD AUTHENTICATION SOT23-3 |
| 產(chǎn)品培訓(xùn)模塊： | CryptoAuthentication™ Introduction |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
| 其它名稱： | AT88SA102S-TSU-TDKR |
10
5.1.1
Command Timing
After a command flag is transmitted, a command block should be sent to the chip. During parsing of the parameters and
subsequent execution of a properly received command, the chip will be busy and not respond to transitions on the signal pin.
The delays for these operations are listed in the table below:
Table 5-2.
Command Timing (Guaranteed by design; not tested)
Parameter
Symbol
Max
Unit
Notes
Parsing Delay
t PARSE
100
s
Delay to check CRC and parse opcode and parameters before an
error indication will be available
MacDelay
t EXEC_MAC
30
ms
Delay to execute MAC command
MemoryDelay
t EXEC_READ
3
ms
Delay to execute Read command
Fuse Delay
t EXEC_FUSE
700
s
Delay to execute BurnFuse command
See Section 6.3 for more details.
SecureDelay
t EXEC_SECURE
36
ms
Max delay to execute BurnSecure command
See Section 6.5 for more details.
PersonalizeDelay
t PERSON
13
ms
Delay to execute GenPersonalizationKey
In this document, tEXEC is used as shorthand for the delay corresponding to whatever command has been sent to the chip.
5.1.2
Transmit Flag
The Transmit flag is used to turn around the signal so that the AT88SA102S can send data back to the system, depending on
its current state. The bytes that the AT88SA102S returns to the system depend on its current state as follows:
Table 5-3.
Return Codes
State Description
Error/Status
Description
After Wake, but prior to
first command
0x11
Indication that a proper Wake token has been received by Atmel
AT88SA102S
After successful command
execution
–
Return bytes per “Output Parameters” in Section 6, Commands. In some
cases this is a single byte with a value of 0x00 indicating success. The
Transmit flag can be resent to the AT88SA102S repeatedly if a re-read of
the output is necessary.
Execution error
0x0F
Command was properly received but could not be executed by the
AT88SA102S. Changes in the AT88SA102S state or the value of the
command bits must happen before it is re-attempted.
After CRC or other
communications error
0xFF
Command was not properly received by the AT88SA102S and should be
re-issued by the system. No attempt was made to execute the command
The AT88SA102S always transmits complete blocks to the system, so in the above table the status/error bytes result in
4-bytes going to the system – count, status/error, CRC x 2.
After receipt of a command block, AT88SA102S will parse the command for errors, a process which takes tPARSE (See Section
5.1.1). After this interval the system can send a transmit token to AT88SA102S – if there was an error, then AT88SA102S will
respond with an error code. If there is no error, then AT88SA102S internally transitions automatically from tPARSE to tEXEC and
will not respond to any transmit tokens until both delays are complete.
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