參數(shù)資料
型號: AT89C51RB2-SLRIM
廠商: Atmel
文件頁數(shù): 2/127頁
文件大?。?/td> 0K
描述: IC MCU FLASH 8051 16K 5V 44-PLCC
標準包裝: 1
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 60MHz
連通性: SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: 閃存
RAM 容量: 1.25K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 剪切帶 (CT)
配用: AT89STK-11-ND - KIT STARTER FOR AT89C51RX2
其它名稱: AT89C51RB2SLRIMCT
10
AT89C51RB2/RC2
4180E–8051–10/06
Table 12. Pin Description for 40 - 44 Pin Packages
Mnemonic
Pin Number
Type
Name and Function
DIL
LCC
VQFP44 1.4
VSS
20
22
16
I
Ground: 0V reference
VCC
40
44
38
I
Power Supply: This is the power supply voltage for normal, idle and power-down
operation
P0.0 - P0.7
39 - 32
43 - 36
37 - 30
I/O
Port 0: Port 0 is an open-drain, bi-directional I/O port. Port 0 pins that have 1s
written to them float and can be used as high impedance inputs. Port 0 must be
polarized to VCC or VSS in order to prevent any parasitic current consumption. Port 0
is also the multiplexed low-order address and data bus during access to external
program and data memory. In this application, it uses strong internal pull-up when
emitting 1s. Port 0 also inputs the code Bytes during Flash programming. External
pull-ups are required during program verification during which P0 outputs the code
Bytes.
P1.0 - P1.7
1 - 8
2 - 9
40 - 44
1 - 3
I/O
Port 1: Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. Port 1 pins that
have 1s written to them are pulled high by the internal pull-ups and can be used as
inputs. As inputs, Port 1 pins that are externally pulled low will source current
because of the internal pull-ups. Port 1 also receives the low-order address Byte
during memory programming and verification.
Alternate functions for AT89C51RB2/RC2 Port 1 include:
1
2
40
I/O
P1.0: Input/Output
I/O
T2 (P1.0): Timer/Counter 2 external count input/Clockout
2
3
41
I/O
P1.1: Input/Output
I
T2EX: Timer/Counter 2 Reload/Capture/Direction Control
I
SS: SPI Slave Select
3
4
42
I/O
P1.2: Input/Output
I
ECI: External Clock for the PCA
4
5
43
I/O
P1.3: Input/Output
I/O
CEX0: Capture/Compare External I/O for PCA Module 0
5
6
44
I/O
P1.4: Input/Output
I/O
CEX1: Capture/Compare External I/O for PCA Module 1
6
7
1
I/O
P1.5: Input/Output
I/O
CEX2: Capture/Compare External I/O for PCA Module 2
I/O
MISO: SPI Master Input Slave Output line
When SPI is in master mode, MISO receives data from the slave peripheral. When
SPI is in slave mode, MISO outputs data to the master controller.
7
8
2
I/O
P1.6: Input/Output
I/O
CEX3: Capture/Compare External I/O for PCA Module 3
I/O
SCK: SPI Serial Clock
SCK outputs clock to the slave peripheral
8
9
3
I/O
P1.7: Input/Output:
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