參數(shù)資料
型號: AT89LP214-20XU
廠商: Atmel
文件頁數(shù): 5/98頁
文件大小: 0K
描述: MCU 8051 2K FLASH 20MHZ 14-TSSOP
產(chǎn)品培訓模塊: MCU Product Line Introduction
標準包裝: 95
系列: 89LP
核心處理器: 8051
芯體尺寸: 8-位
速度: 20MHz
連通性: SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 12
程序存儲器容量: 2KB(2K x 8)
程序存儲器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
包裝: 管件
13
3538E–MICRO–11/10
AT89LP213/214
9.2
External Clock Source
The external clock option disables the oscillator amplifier and allows XTAL1 to be driven directly
by the clock source as shown in Figure 9-2. XTAL2 may be left unconnected, used as P3.3 I/O,
or configured to output a divided version of the system clock.
Figure 9-2.
External Clock Drive Configuration
9.3
Internal RC Oscillator
The AT89LP213/214 has an internal RC oscillator tuned to 8.0 MHz ±1.0% at 5.0V and 25
° C.
When enabled as the clock source, XTAL1 and XTAL2 may be used as P3.2 and P3.3 respec-
tively. XTAL2 may also be configured to output a divided version of the system clock. The
frequency of the oscillator may be adjusted by changing the RC Adjust Fuses. (See “User Con-
figuration Fuses” on page 72). A copy of the initial factory setting is stored at location 0007h of
the Atmel SIgnature.
9.4
System Clock Out
When the AT89LP213/214 is configured to use either an external clock or the internal RC oscil-
lator, a divided version of the system clock may be output on XTAL2 (P3.3). The Clock Out
feature is enabled by setting the COE bit in CLKREG. The two CDV bits determine the clock
divide ratio. For example, setting COE = “1” and CDIV = “00” when using the internal oscillator
will result in a 4.0 MHz clock output on P3.3. P3.3 must be configured as an output in order to
use the clock out feature.
XTAL2 (P3.3)
XTAL1 (P3.2)
GND
NC, GPIO, or
CLKOUT
EXTERNAL
OSCILLATOR
SIGNAL
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VE-B5X-IW-F2 CONVERTER MOD DC/DC 5.2V 100W
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AT89LP213-20XU MCU 8051 2K FLASH 20MHZ 14-TSSOP
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