參數(shù)資料
型號: AT89LP214-20XU
廠商: Atmel
文件頁數(shù): 62/98頁
文件大?。?/td> 0K
描述: MCU 8051 2K FLASH 20MHZ 14-TSSOP
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 95
系列: 89LP
核心處理器: 8051
芯體尺寸: 8-位
速度: 20MHz
連通性: SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 12
程序存儲器容量: 2KB(2K x 8)
程序存儲器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
包裝: 管件
65
3538E–MICRO–11/10
AT89LP213/214
22.2
Software Breakpoints
The AT89LP213/214 microcontroller includes a BREAK instruction for implementing program
memory breakpoints in software. A software breakpoint can be inserted manually by placing the
BREAK instruction in the program code. Some emulator systems may allow for automatic inser-
tion/deletion of software breakpoints. The Flash memory must be re-programmed each time a
software breakpoint is changed. Frequent insertions/deletions of software breakpoints will
reduce the data retention of the nonvolatile memory. Devices used for debugging purposes
should not be shipped to end customers. The BREAK instruction is treated as a two-cycle NOP
when OCD is disabled.
22.3
Limitations of On-chip Debug
The AT89LP213/214 is a low-cost, low-pincount yet fully-featured microcontroller that multi-
plexes several functions on its limited I/O pins. Some device functionality must be sacrificed to
provide resources for On-chip Debugging. The On-chip Debug System has the following
limitations:
The Debug Clock pin (DCL) is physically located on that same pin as Port Pin P1.3 and the
External Reset (RST). Therefore, neither P1.3 nor an external reset source may be emulated
when OCD is enabled.
The Debug Data pin (DDA) is physically located on either the XTAL1/P3.2 or XTAL2/P3.3 pin.
The crystal oscillator is therefore not supported during debug. The user must select either the
Internal RC Oscillator or the External Clock source to provide the system clock. Devices
fused for the crystal oscillator will default to external clock mode when OCD is enabled.
When using the Internal RC Oscillator during debug, DDA is located on the XTAL1/P3.2 pin.
The INT0 function cannot be emulated in this mode.
When using the External Clock during debug, DDA is located on the XTAL2/P3.3 pin and the
system clock drives XTAL1/P3.2. The INT0, INT1 and CLKOUT functions cannot be emulated
in this mode.
The AT89LP213/214 does not support In-Application Programming and therefore the device
must be reset before changing the program code during debugging. This includes the
insertion/deletion of software breakpoints.
When using the watchdog to generate a break, the state of the watchdog will not be reset. An
OCD reset command should be sent to the device prior to resuming normal execution to
ensure correct watchdog behavior.
23. Programming the Flash Memory
The Atmel AT89LP213/214 microcontroller features 2KB of on-chip In-System Programmable
Flash program memory. In-System Programming (ISP) allows programming and reprogramming
of the microcontroller positioned inside the end system. Using a simple 4-wire SPI interface, the
In-System programmer communicates serially with the AT89LP213/214 microcontroller, repro-
gramming all nonvolatile memories on the chip. In-System programming eliminates the need for
physical removal of the chips from the system. This will save time and money, both during devel-
opment in the lab, and when updating the software or parameters in the field. The ISP interface
of the AT89LP213/214 includes the following features:
Four Wire SPI Programming Interface
Active-low Reset Entry into Programming
Slave Select allows multiple devices on same interface
User Signature Array
相關(guān)PDF資料
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VE-B5X-IW-F2 CONVERTER MOD DC/DC 5.2V 100W
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AT89LP213-20XU MCU 8051 2K FLASH 20MHZ 14-TSSOP
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