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參數(shù)資料
| 型號(hào)： | AT90S1200-12PI |
| 廠商： | Atmel |
| 文件頁(yè)數(shù)： | 3/71頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 1K FLSH 12MHZ IT 20DIP |
| 標(biāo)準(zhǔn)包裝： | 18 |
| 系列： | AVR® 90S |
| 核心處理器： | AVR |
| 芯體尺寸： | 8-位 |
| 速度： | 12MHz |
| 連通性： | SPI |
| 外圍設(shè)備： | POR，WDT |
| 輸入/輸出數(shù)： | 15 |
| 程序存儲(chǔ)器容量： | 1KB（512 x 16） |
| 程序存儲(chǔ)器類型： | 閃存 |
| EEPROM 大小： | 64 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4 V ~ 6 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 20-DIP（0.300"，7.62mm） |
| 包裝： | 管件 |
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11
AT90S1200
0838H–AVR–03/02
Status Register – SREG
The AVR status register (SREG) at I/O space location $3F is defined as:
Bit 7 – I: Global Interrupt Enable
The global interrupt enable bit must be set (one) for the interrupts to be enabled. The
individual interrupt enable control is then performed in separate control registers. If the
global interrupt enable bit is cleared (zero), none of the interrupts are enabled indepen-
dent of the individual interrupt enable settings. The I-bit is cleared by hardware after an
interrupt has occurred, and is set by the RETI instruction to enable subsequent
interrupts.
Bit 6 – T: Bit Copy Storage
The bit copy instructions BLD (Bit LoaD) and BST (Bit STore) use the T-bit as source
and destination for the operated bit. A bit from a register in the register file can be copied
into T by the BST instruction, and a bit in T can be copied into a bit in a register in the
register file by the BLD instruction.
Bit 5 – H: Half-carry Flag
The half-carry flag H indicates a half carry in some arithmetic operations. See the
Instruction Set description for detailed information.
Bit 4 – S: Sign Bit, S = N
⊕V
The S-bit is always an exclusive or between the negative flag N and the two’s comple-
ment overflow flag V. See the Instruction Set description for detailed information.
Bit 3 – V: Two’s Complement Overflow Flag
The two’s complement overflow flag V supports two’s complement arithmetics. See the
Instruction Set description for detailed information.
Bit 2 – N: Negative Flag
The negative flag N indicates a negative result after the different arithmetic and logic
operations. See the Instruction Set description for detailed information.
Bit 1 – Z: Zero Flag
The zero flag Z indicates a zero result after the different arithmetic and logic operations.
See the Instruction Set description for detailed information.
Bit 0 – C: Carry Flag
The carry flag C indicates a carry in an arithmetic or logic operation. See the Instruction
Set description for detailed information.
Note that the status register is not automatically stored when entering an interrupt rou-
tine and restored when returning from an interrupt routine. This must be handled by
software.
Bit
7
6
543210
$3F
I
T
H
S
V
N
Z
C
SREG
Read/Write
R/W
Initial Value
0
000000
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT90S1200-12SC | 功能描述:8位微控制器 -MCU 1K Flash 5V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| AT90S1200-12SI | 功能描述:8位微控制器 -MCU 1k bit RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| AT90S1200-12YC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 1K Byte of In-System Programmable Flash |
| AT90S1200-12YI | 功能描述:8位微控制器 -MCU 1K Flash 3V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| AT90S1200-4PC | 功能描述:8位微控制器 -MCU 1K Flash 3V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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