參數(shù)資料
型號: AT90S1200-12PI
廠商: Atmel
文件頁數(shù): 39/71頁
文件大?。?/td> 0K
描述: IC MCU 1K FLSH 12MHZ IT 20DIP
標(biāo)準(zhǔn)包裝: 18
系列: AVR® 90S
核心處理器: AVR
芯體尺寸: 8-位
速度: 12MHz
連通性: SPI
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 15
程序存儲器容量: 1KB(512 x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 64 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-DIP(0.300",7.62mm)
包裝: 管件
44
AT90S1200
0838H–AVR–03/02
Serial Downloading
Both the program and data memory arrays can be programmed using the SPI bus while
RESET is pulled to GND. The serial interface consists of pins SCK, MOSI (input) and
MISO (output) (see Figure 34). After RESET is set low, the Programming Enable
instruction needs to be executed first before program/erase instructions can be
executed.
Figure 34. Serial Programming and Verify
Note:
If the device is clocked by the Internal Oscillator, it is no need to connect a clock source
to the XTAL1 pin
For the EEPROM, an auto-erase cycle is provided within the self-timed write instruction
and there is no need to first execute the Chip Erase instruction. The Chip Erase instruc-
tion turns the content of every memory location in both the Program and EEPROM
arrays into $FF.
The program and EEPROM memory arrays have separate address spaces: $0000 to
$01FF for Flash program memory and $000 to $03F for EEPROM data memory.
Either an external system clock is supplied at pin XTAL1 or a crystal needs to be con-
nected across pins XTAL1 and XTAL2. The minimum low and high periods for the Serial
Clock (SCK) input are defined as follows:
Low: > 1 XTAL1 clock cycle
High: > 4 XTAL1 clock cycles
Serial Programming
Algorithm
When writing serial data to the AT90S1200, data is clocked on the rising edge of SCK.
When reading data from the AT90S1200, data is clocked on the falling edge of SCK.
See Figure 35 and Table 20 for timing details.
To program and verify the AT90S1200 in the Serial Programming mode, the following
sequence is recommended (See 4-byte instruction formats in Table 17):
1.
Power-up sequence:
Apply power between V
CC and GND while RESET and SCK are set to “0”. If a crys-
tal is not connected across pins XTAL1 and XTAL2 or the device is not running from
the Internal RC Oscillator, apply a clock signal to the XTAL1 pin. If the programmer
can not guarantee that SCK is held low during power-up, RESET must be given a
positive pulse after SCK has been set to “0”.
2.
Wait for at least 20 ms and enable serial programming by sending the Program-
ming Enable serial instruction to the MOSI (PB5) pin.
AT90S1200
VCC
2.7 - 6.0V
PB7
PB6
PB5
RESET
GND
XTAL1
SCK
MISO
MOSI
GND
CLOCK INPUT
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