參數(shù)資料
型號: AT91RM9200-EK
廠商: Atmel
文件頁數(shù): 13/41頁
文件大?。?/td> 0K
描述: DEVEL KIT
標準包裝: 1
系列: ARM®, Thumb®
類型: MCU
適用于相關產(chǎn)品: ARM920T
所含物品: 開發(fā)板,AC 適配器,線纜以及軟件
配用: AT91SAM-ICE-ND - EMULATOR FOR AT91 ARM7/ARM9
其它名稱: Q2427672
20
1768MS–ATARM–09-Jul-09
AT91RM9200
– the Master Clock MCK
– the USB Clocks, UHPCK and UDPCK, respectively for the USB Host Port and the
USB Device Port
– Programmable automatic PLL switch-off in USB Device suspend conditions
– up to thirty peripheral clocks
– four programmable clock outputs PCK0 to PCK3
Four operating modes:
– Normal Mode, Idle Mode, Slow Clock Mode, Standby Mode
9.4
Debug Unit
System peripheral to facilitate debug of Atmel’s ARM-based systems
Composed of the following functions
–Two-pin UART
– Debug Communication Channel (DCC) support
– Chip ID Registers
Two-pin UART
– Implemented features are 100% compatible with the standard Atmel USART
– Independent receiver and transmitter with a common programmable Baud Rate
Generator
– Even, Odd, Mark or Space Parity Generation
– Parity, Framing and Overrun Error Detection
– Automatic Echo, Local Loopback and Remote Loopback Channel Modes
– Interrupt generation
– Support for two PDC channels with connection to receiver and transmitter
Debug Communication Channel Support
– Offers visibility of COMMRX and COMMTX signals from the ARM Processor
– Interrupt generation
Chip ID Registers
– Identification of the device revision, sizes of the embedded memories, set of
peripherals
9.5
PIO Controller
Up to 32 programmable I/O Lines
Fully programmable through Set/Clear Registers
Multiplexing of two peripheral functions per I/O Line
For each I/O Line (whether assigned to a peripheral or used as general purpose I/O)
– Input change interrupt
– Glitch filter
– Multi-drive option enables driving in open drain
– Programmable pull up on each I/O line
– Pin data status register, supplies visibility of the level on the pin at any time
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