參數(shù)資料
型號: ATA6670-FFQW
廠商: Atmel
文件頁數(shù): 5/19頁
文件大?。?/td> 0K
描述: IC TXRX LIN DUAL 14VDFN
標準包裝: 6,000
系列: *
其它名稱: ATA6670-FFQW-ND
13
Atmel ATA6670 [DATASHEET]
9204F–AUTO–06/12
7.12
Leakage current at loss of
battery, node has to sustain the
current that can flow under this
condition, bus must remain
operational under this condition
VBAT disconnected
VSUP_Device = GND
0V < VBUS < 18V
LIN
IBUS_NO_Bat
0.1
2
A
7.13 Capacitance on pin LIN to GND
LIN
CLIN
20
pF
D
8
LIN Bus Receiver
8.1
Center of receiver threshold
VBUS_CNT =
(Vth_dom + Vth_rec)/2
LIN
VBUS_CNT
0.475
×
VS
0.5
×
VS
0.525
× VS
V
A
8.2
Receiver dominant state
VEN = 5V
LIN
VBUSdom
–27
0.4
×
VS
V
A
8.3
Receiver recessive state
VEN = 5V
LIN
VBUSrec
0.6
×
VS
40
V
A
8.4
Receiver input hysteresis
VHYS = Vth_rec – Vth_dom
LIN
VBUShys
0.028
×
VS
0.1
×
VS
0.175
× VS
V
A
8.5
Pre-wake detection LIN
high-level input voltage
LIN
VLINH
VS
2V
VS +
0.3V
V
A
8.6
Pre-wake detection LIN
Low-level input voltage
Switches the LIN receiver on
LIN
VLINL
–27V
VS
3.3V
V
A
8.7
LIN pre-wake pull-up current
VS < 27V
VLIN = 0V
LIN
ILINWAKE
–30
–10
A
9
Internal Timers
9.1
Dominant time for wake-up via
LIN bus
VLIN = 0V
LIN
tBUS
30
90
150
s
A
9.2
Debounce time of low pulse for
wake-up via pin WAKE2 (only
available at transceiver 2).
Transceiver 2:
locla wake-up
VWAKE2 = 0V
WAKE2
tWAKE
7
35
50
s
A
9.3
Time delay for mode change
from Fail-safe mode to Normal
mode via pin EN
VEN = 5V
EN
tnorm
2
7
15
s
A
9.4
Time delay for mode change
from Normal mode into Sleep
mode via pin EN
VEN = 0V
EN
tsleep
7
12
20
s
B
9.5
TXD dominant time out time
VTXD = 0V
TXD
tdom
27
55
70
ms
A
9.6
Monitoring time for wake-up over
LIN bus
LIN
tmon
6
10
15
ms
A
5.
Electrical Characteristics (Continued)
5V < VS < 27V, Tj = –40°C to +150°C; the values below are valid for each of the two nearly identical integrated LIN transceivers unless
otherwise specified.
No. Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit Type*
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
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