參數(shù)資料
型號: ATF22V10CZ-15XC
廠商: Atmel
文件頁數(shù): 18/19頁
文件大小: 0K
描述: IC PLD 15NS 24TSSOP
標準包裝: 5,000
系列: 22V10
可編程類型: EE PLD
宏單元數(shù): 10
輸入電壓: 5V
速度: 15ns
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 24-TSSOP
包裝: 管件
其它名稱: ATF22V10CZ15XC
8
0778L–PLD–8/10
Atmel ATF22V10C(Q)Z
9.
Compiler Mode Selection
Table 9-1.
Compiler Mode Selection
10.
Functional Logic Diagram Description
The Functional Logic Diagram describes the Atmel ATF22V10CZ/CQZ architecture.
The ATF22V10CZ/CQZ has 12 inputs and 10 I/O macrocells. Each macrocell can be configured into one of four
output configurations: active high/low, registered/combinatorial output.The universal architecture of the
ATF22V10CZ/CQZ can be programmed to emulate most 24-pin PAL devices.
Unused product terms are automatically disabled by the compiler to decrease power consumption. A security fuse,
when programmed, protects the contents of the ATF22V10CZ/CQZ. Eight bytes (64-fuses) of User Signature are
accessible to the user for purposes such as storing project name, part number, revision or date. The User
Signature is accessible regardless of the state of the security fuse.
PAL Mode
(5828 Fuses)
GAL Mode
(5892 Fuses)
Synario
Atmel ATF22V10C (DIP)
Atmel ATF22V10C (PLCC)
Atmel ATF22V10C DIP (UES)
Atmel ATF22V10C PLCC (UES)
WINCUPL
P22V10
P22V10LCC
G22V10
G22V10LCC
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