參數(shù)資料
型號(hào)： ATF2500C-12JL
廠商： ATMEL CORP
元件分類： PLD
英文描述： EE PLD, 12 ns, PQCC44
封裝： PLASTIC, MS-018AC, LCC-44
文件頁(yè)數(shù)： 23/33頁(yè)
文件大?。?/td> 693K
代理商： ATF2500C-12JL
ATF2500C Family
3
Preload and Observability of
Registered Outputs
The ATF2500Cs registers are provided with circuitry to
allow loading of each register asynchronously with either a
high or a low. This feature will simplify testing since any
state can be forced into the registers to control test
sequencing. A V
IH level on the odd I/O pins will force the
appropriate register high; a V
IL will force it low, independent
of the polarity or other configuration bit settings.
The PRELOAD state is entered by placing an 10.25V to
10.75V signal on SMP lead 42. When the preload clock
SMP lead 23 is pulsed high, the data on the I/O pins is
placed into the 12 registers chosen by the Q select and
even/odd select pins.
Register 2 observability mode is entered by placing an
10.25V to 10.75V signal on pin/lead 2. In this mode, the
contents of the buried register bank will appear on the
associated outputs when the OE control signals are active.
Programming Software Support
As with all other Atmel PLDs, several third party PLD devel-
opment software products and programmers will support
the ATF2500Cs.
Se vera l t h ird p a rt y pro g ra mme rs w ill sup port t h e
ATF2500C as well. Additionally, the ATF2500C may be
programmed to perform the ATV2500H/Ls functional sub-
set (no T-type flip-flops, pin clocking or D/T2 feedback)
using the ATV2500H/L JEDEC file. In this case, the
ATF2500C becomes a direct replacement or speed
upgrade for the ATV2500H/L (additional GND connections
are required). Please refer to the Programmable Logic
Development Tools section for a complete PLD software
and programmer listing.
Security Fuse Usage
A single fuse is provided to prevent unauthorized copying
of ATF2500C fuse patterns. Once programmed, the out-
puts will read programmed during verify.
The security fuse should be programmed last, as its effect
is immediate.
Parameter
Description
Typ
Max
Units
t
PR
Power-up Reset Time
600
1000
ns
VRST
Power-up Reset Voltage
3.8
4.5
V
Level Forced on
Odd I/O Pin during
PRELOAD Cycle
Q Select Pin
State
Even/Odd
Select
Even Q1 State
after Cycle
Even Q2 State
after Cycle
Odd Q1 State
after Cycle
Odd Q2 State
after Cycle
V
IH/VIL
Low
High/Low
X
V
IH/VIL
High
Low
X
High/Low
X
VIH/VIL
Low
High
X
High/Low
X
V
IH/VIL
High
X
High/Low
相關(guān)PDF資料
PDF描述
ATF2500CL-20KC EE PLD, 20 ns, CQCC44
ATF2500CL-20KM EE PLD, 20 ns, CQCC44
ATF2500CL-20NM EE PLD, 20 ns, CQCC44
ATF2500CQ-25GM/883 EE PLD, 25 ns, CDIP40
ATF2500CQ-25JC EE PLD, 25 ns, PQCC44
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ATF2500C-15JC 功能描述:CPLD - 復(fù)雜可編程邏輯器件 2500 GATE 24 MACRO STD PWR 5V-15NS RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
ATF2500C-15JI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 2500 GATE 24 MACRO STD PWR 5V-15NS RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
ATF2500C-15JN 功能描述:CPLD - 復(fù)雜可編程邏輯器件 ASICS RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
ATF2500C-15JU 功能描述:CPLD - 復(fù)雜可編程邏輯器件 15 ns 24 I/O Pins 24 macorcells 48 reg RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
ATF2500C-15JU SL383 制造商:Atmel Corporation 功能描述:ATF2500C 1.5K GATES 24 MC IND EEPROM 5V 44 PLCC - Tape and Reel
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