參數(shù)資料
型號: ATMEGA649V-8AI
廠商: Atmel
文件頁數(shù): 46/146頁
文件大?。?/td> 0K
描述: IC AVR MCU FLASH 64K 1.8V 64TQFP
產(chǎn)品培訓模塊: megaAVR Introduction
標準包裝: 90
系列: AVR® ATmega
核心處理器: AVR
芯體尺寸: 8-位
速度: 8MHz
連通性: SPI,UART/USART,USI
外圍設(shè)備: 欠壓檢測/復位,LCD,POR,PWM,WDT
輸入/輸出數(shù): 53
程序存儲器容量: 64KB(32K x 16)
程序存儲器類型: 閃存
EEPROM 大小: 2K x 8
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 托盤
PIC16(L)F1825/1829
DS41440C-page 292
2010-2012 Microchip Technology Inc.
REGISTER 25-5:
SSPMSK: SSPx MASK REGISTER
R/W-1/1
MSK<7:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
bit 7-1
MSK<7:1>:
Mask bits
1 = The received address bit n is compared to SSPxADD<n> to detect I2C address match
0 = The received address bit n is not used to detect I2C address match
bit 0
MSK<0>:
Mask bit for I2C Slave mode, 10-bit Address
I2C Slave mode, 10-bit address (SSPM<3:0> = 0111 or 1111):
1 = The received address bit 0 is compared to SSPxADD<0> to detect I2C address match
0 = The received address bit 0 is not used to detect I2C address match
I2C Slave mode, 7-bit address, the bit is ignored
REGISTER 25-6:
SSPxADD: MSSPx ADDRESS AND BAUD RATE REGISTER (I2C MODE)
R/W-0/0
ADD<7:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
Master mode:
bit 7-0
ADD<7:0>:
Baud Rate Clock Divider bits
SCLx pin clock period = ((ADD<7:0> + 1) *4)/FOSC
10-Bit Slave mode — Most Significant Address byte:
bit 7-3
Not used:
Unused for Most Significant Address byte. Bit state of this register is a “don’t care”. Bit
pattern sent by master is fixed by I2C specification and must be equal to ‘11110’. However, those bits
are compared by hardware and are not affected by the value in this register.
bit 2-1
ADD<2:1>:
Two Most Significant bits of 10-bit address
bit 0
Not used:
Unused in this mode. Bit state is a “don’t care”.
10-Bit Slave mode — Least Significant Address byte:
bit 7-0
ADD<7:0>:
Eight Least Significant bits of 10-bit address
7-Bit Slave mode:
bit 7-1
ADD<7:1>:
7-bit address
bit 0
Not used:
Unused in this mode. Bit state is a “don’t care”.
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