參數(shù)資料
型號: ATSAM3N1CB-CU
廠商: Atmel
文件頁數(shù): 17/60頁
文件大?。?/td> 0K
描述: IC MCU 64KB CORTEX-M3 100BGA
標(biāo)準(zhǔn)包裝: 260
系列: SAM3N
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 48MHz
連通性: I²C,IrDA,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 79
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x10b; D/A 1x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TFBGA
包裝: 托盤
24
11011BS–ATARM–22-Feb-12
SAM3N Summary
6.
Input/Output Lines
The SAM3N has several kinds of input/output (I/O) lines such as general purpose I/Os (GPIO)
and system I/Os. GPIOs can have alternate functionality due to multiplexing capabilities of the
PIO controllers. The same PIO line can be used whether in IO mode or by the multiplexed
peripheral. System I/Os include pins such as test pins, oscillators, erase or analog inputs.
6.1
General Purpose I/O Lines
GPIO Lines are managed by PIO Controllers. All I/Os have several input or output modes such
as pull-up or pull-down, input Schmitt triggers, multi-drive (open-drain), glitch filters, debouncing
or input change interrupt. Programming of these modes is performed independently for each I/O
line through the PIO controller user interface. For more details, refer to the product PIO control-
ler section.
The input output buffers of the PIO lines are supplied through VDDIO power supply rail.
The SAM3N embeds high speed pads able to handle up to 45 MHz for SPI clock lines and 35
MHz on other lines. See AC Characteristics Section in the Electrical Characteristics Section of
the datasheet for more details. Typical pull-up and pull-down value is 100 k
Ω for all I/Os.
Each I/O line also embeds an ODT (On-Die Termination), (see Figure 6-1). It consists of an
internal series resistor termination scheme for impedance matching between the driver output
(SAM3N) and the PCB trace impedance preventing signal reflection. The series resistor helps to
reduce I/O switching current (di/dt) thereby reducing in turn, EMI. It also decreases overshoot
and undershoot (ringing) due to inductance of interconnect between devices or between boards.
In conclusion ODT helps diminish signal integrity issues.
Figure 6-1.
On-Die Termination
6.2
System I/O Lines
System I/O lines are pins used by oscillators, test mode, reset and JTAG to name but a few.
Described below are the SAM3N system I/O lines shared with PIO lines:
These pins are software configurable as general purpose I/O or system pins. At startup the
default function of these pins is always used.
PCB Trace
Z0 ~ 50 Ohms
Receiver
SAM3 Driver with
Rodt
Zout ~ 10 Ohms
Z0 ~ Zout + Rodt
ODT
36 Ohms Typ.
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