- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3805 > ATTINY24A-SSU (Atmel)MCU AVR 2K FLASH 20MHZ 14SOIC PDF資料下載
參數(shù)資料
| 型號(hào)： | ATTINY24A-SSU |
| 廠商： | Atmel |
| 文件頁(yè)數(shù)： | 2/135頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | MCU AVR 2K FLASH 20MHZ 14SOIC |
| 產(chǎn)品培訓(xùn)模塊： | MCU Product Line Introduction tinyAVR Introduction |
| 標(biāo)準(zhǔn)包裝： | 57 |
| 系列： | AVR® ATtiny |
| 核心處理器： | AVR |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 連通性： | USI |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，POR，PWM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 12 |
| 程序存儲(chǔ)器容量： | 2KB（1K x 16） |
| 程序存儲(chǔ)器類型： | 閃存 |
| EEPROM 大?。?/td> | 128 x 8 |
| RAM 容量： | 128 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.8 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 包裝： | 管件 |
| 配用： | ATSTK600-RC46-ND - STK600 ROUTING CARD AVR ATSTK505-ND - ADAPTER KIT FOR 14PIN AVR MCU |
第1頁(yè)當(dāng)前第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)
10
8183F–AVR–06/12
ATtiny24A/44A/84A
In the different addressing modes these address registers have functions as fixed displacement,
automatic increment, and automatic decrement (see the instruction set reference for details).
4.5
Stack Pointer
The Stack is mainly used for storing temporary data, for storing local variables and for storing
return addresses after interrupts and subroutine calls. The Stack Pointer Register always points
to the top of the Stack. Note that the Stack is implemented as growing from higher memory loca-
tions to lower memory locations. This implies that a Stack PUSH command decreases the Stack
Pointer.
The Stack Pointer points to the data SRAM Stack area where the Subroutine and Interrupt
Stacks are located. This Stack space in the data SRAM must be defined by the program before
any subroutine calls are executed or interrupts are enabled. The Stack Pointer must be set to
point above 0x60. The Stack Pointer is decremented by one when data is pushed onto the Stack
with the PUSH instruction, and it is decremented by two when the return address is pushed onto
the Stack with subroutine call or interrupt. The Stack Pointer is incremented by one when data is
popped from the Stack with the POP instruction, and it is incremented by two when data is
popped from the Stack with return from subroutine RET or return from interrupt RETI.
The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The number of
bits actually used is implementation dependent. Note that the data space in some implementa-
tions of the AVR architecture is so small that only SPL is needed. In this case, the SPH Register
will not be present.
4.6
Instruction Execution Timing
This section describes the general access timing concepts for instruction execution. The AVR
CPU is driven by the CPU clock clk
CPU, directly generated from the selected clock source for the
chip. No internal clock division is used.
Figure 4-4 shows the parallel instruction fetches and instruction executions enabled by the Har-
vard architecture and the fast access Register File concept. This is the basic pipelining concept
to obtain up to 1 MIPS per MHz with the corresponding unique results for functions per cost,
functions per clocks, and functions per power-unit.
X-register
7
0
7
0
R27 (0x1B)
R26 (0x1A)
15
YH
YL
0
Y-register
7
0
7
0
R29 (0x1D)
R28 (0x1C)
15
ZH
ZL
0
Z-register
7
0
7
0
R31 (0x1F)
R30 (0x1E)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ATTINY13A-MMU | IC MCU AVR 1K FLASH 20MHZ 10-DFN |
| HSHM-GUIDE-PIN-1 | CONN HSHM GUIDE PIN M4-.7-6G |
| ATTINY13A-SU | IC MCU AVR 1K FLASH 20MHZ 8SOIC |
| ATTINY13A-PU | IC MCU AVR 1K FLASH 20MHZ 8PDIP |
| ATTINY48-MUR | MCU AVR 4KB FLASH 12MHZ 32QFN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ATTINY24A-SSUR | 功能描述:8位微控制器 -MCU AVR 2KB FLSH 128B EE USI ADC 20MHz 1.8V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| ATTINY24V | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash |
| ATTINY24V_09 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash |
| ATTINY24V-10MU | 功能描述:8位微控制器 -MCU AVR 2K FLASH 128B EE & SRAM USI ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| ATTINY24V-10MUR | 功能描述:8位微控制器 -MCU 2KB FL 128B EE 128B SRAM 10MHz, IND 1.8V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。