Notes: 1. The Power-on Reset will not work unless the supply voltage has been below V
參數(shù)資料
型號: ATTINY26L-8PU
廠商: Atmel
文件頁數(shù): 97/169頁
文件大?。?/td> 0K
描述: IC MCU AVR 2K 5V 8MHZ 20-DIP
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
tinyAVR Introduction
標(biāo)準(zhǔn)包裝: 18
系列: AVR® ATtiny
核心處理器: AVR
芯體尺寸: 8-位
速度: 8MHz
連通性: USI
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 16
程序存儲(chǔ)器容量: 2KB(1K x 16)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 128 x 8
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 11x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-DIP(0.300",7.62mm)
包裝: 管件
產(chǎn)品目錄頁面: 612 (CN2011-ZH PDF)
配用: ATSTK600-RC08-ND - STK600 ROUTING CARD AVR
ATSTK600-ND - DEV KIT FOR AVR/AVR32
ATAVRISP2-ND - PROGRAMMER AVR IN SYSTEM
ATSTK505-ND - ADAPTER KIT FOR 14PIN AVR MCU
其它名稱: ATTINY26L-8PJ
ATTINY26L-8PJ-ND
33
1477K–AVR–08/10
ATtiny26(L)
Notes: 1. The Power-on Reset will not work unless the supply voltage has been below VPOT (falling)
2. VBOT may be below nominal minimum operating voltage for some devices. For devices where
this is the case, the device is tested down to VCC = VBOT during the production test. This guar-
antees that a Brown-out Reset will occur before VCC drops to a voltage where correct
operation of the microcontroller is no longer guaranteed. The test is performed using
BODLEVEL=1 for ATtiny26L and BODLEVEL=0 for ATtiny26. BODLEVEL=1 is not applicable
for ATtiny26.
See start-up times from reset from “System Clock and Clock Options” on page 23. When the
CPU wakes up from Power-down, only the clock counting part of the start-up time is used. The
Watchdog Oscillator is used for timing the real-time part of the start-up time.
Power-on Reset
A Power-on Reset (POR) pulse is generated by an On-chip Detection circuit. The detection level
is defined in Table 16 The POR is activated whenever VCC is below the detection level. The POR
circuit can be used to trigger the Start-up Reset, as well as detect a failure in supply voltage.
The Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes a delay counter, which determines the delay, for
which the device is kept in RESET after VCC rise. The time-out period of the delay counter can
be defined by the user through the CKSEL Fuses. The different selections for the delay period
are presented in “System Clock and Clock Options” on page 23. The RESET signal is activated
again, without any delay, when the VCC decreases below detection level.
Table 16. Reset Characteristics
Symbol
Parameter
Condition
Min
Typ
Max
Units
VPOT
Power-on Reset Threshold
Voltage (rising)
1.4
2.3
V
Power-on Reset Threshold
Voltage (falling)(1)
1.3
2.3
V
VRST
RESET Pin Threshold Voltage
0.2
0.9
VCC
tRST
Minimum pulse width on
RESET Pin
1.5
s
VBOT
Brown-out Reset Threshold
Voltage(2)
BODLEVEL = 1
2.4
2.7
2.9
V
BODLEVEL = 0
3.7
4.0
4.5
tBOD
Minimum low voltage period for
Brown-out Detection
BODLEVEL = 1
2
s
BODLEVEL = 0
2
s
VHYST
Brown-out Detector hysteresis
130
mV
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